Dave's PCF WIP: Paragraphs

Paragraphs

Actions	Matter	Content	Para #	Notes	Modified
View Edit Delete	US10998041B1	In this manner, a read scan operation may leverage a correlation between two memory states as a starting point for analysis. This may allow the best location for these read levels to be determined using fewer iterations, or more narrowly spaced read level windows for a valley search operation, in one embodiment. In another embodiment, the location given through use of these tables (shift correlation table 900, width correlation table 1000) may enable optimization of a BES read scan operation.	203	Added by DJM 12 2021	12/22/21, 12:00 AM
View Edit Delete	US10998041B1	FIG. 11 illustrates a read scan operation 1100 in accordance with one embodiment. The read scan operation 1100 illustrated may comprise using an optimal read level determined within first read level window 1102 to more efficiently scan another read level window, such as second read level window 1104.	204	Added by DJM 12 2021	12/22/21, 12:00 AM
View Edit Delete	US10998041B1	A read scan operation may scan read levels within first read level window 1102 checking for a first candidate read level, among candidate read levels 1106, that activates the fewest number of memory cells in relation to other candidate read levels 1106 within the first read level window 1102. This first read level window 1102 may be configured to test candidate read levels 1106 between adjacent memory states 1108, memory state C and memory state D to locate an optimal read level D 1110.	205	Added by DJM 12 2021	12/22/21, 12:00 AM
View Edit Delete	US10998041B1	Once a read scan operation determines read level D 1110, the read scan operation may configure a second read level window 1104 based on a correlation between at least one of the two adjacent memory states 1108 (e.g., C or D) and one or more other adjacent memory states 1108 associated with the second read level window 1104 (e.g., J and K). Advantageously, in one embodiment, the correlation enables the second read level window 1104 to be smaller, e.g., include fewer candidate read levels 1112 than had a correlation not been used to configure the second read level window 1104.	206	Added by DJM 12 2021	12/22/21, 12:00 AM
View Edit Delete	US10998041B1	Next, the read scan operation scans a second read level window 1104. Scanning the configured second read level window 1104 for a second candidate read level may include determining a second candidate read level that activates the fewest number of memory cells in relation to the other candidate read levels 1112 within the second read level window 1104. Once the read scan operation determines an optimal read level D 1110 and optimal read level K 1114, the read scan operation configures a read operation to use optimal read level D 1110 and optimal read level K 1114.	207	Added by DJM 12 2021	12/22/21, 12:00 AM
View Edit Delete	US10998041B1	In one embodiment, configuring the second read level window 1104 may involve determining a correlation factor based on an identifier for one of the two adjacent memory states 1108 associated with the first read level window 1102 (memory state C and memory state D). This identifier may be related a label given the memory state, such as "C" or "D" in the illustrated example, or some other unique identifier for the memory state. Correlation factors, in one embodiment, may be determined using a correlation data structure, such as a shift correlation table 900 and/or width correlation table 1000.	208	Added by DJM 12 2021	12/22/21, 12:00 AM
View Edit Delete	US10998041B1	The read scan operation may apply a determined correlation factor to the second read level window 1104 such that the correlation affects the candidate read levels 1112 of the second read level window 1104. For second read level window 1104, for example, the candidate read levels 1112 #23', #24', #25', #26', and #27', may be centered around a projected threshold voltage, e.g., #25' determined by using the a correlation factor between memory state C and memory state J or memory state C and memory state K, or memory state D and memory state J and memory state D and memory state K.	209	Added by DJM 12 2021	12/22/21, 12:00 AM
View Edit Delete	US10998041B1	In one embodiment, the correlation factor is used to narrow the spacing between candidate read levels 1112, (e.g., #23' through #27') and/or may be used to scan fewer candidate read levels (e.g., 4 versus 7, 4 because #25' is a starting read level). Consequently, second read level window 1104 is smaller, has fewer candidate read levels 1112, than a read level window without using a correlation and/or correlation factor and results in a faster scanning time.	210	Added by DJM 12 2021	12/22/21, 12:00 AM
View Edit Delete	US10998041B1	In one embodiment, applying the correlation factor may comprise multiplying a candidate read level of the second read level window 1104 by the correlation factor. In another embodiment, applying the correlation factor may comprise changing a predefined order for testing/checking the candidate read levels 1112 of the second read level window 1104 such that candidate read levels that incorporate the correlation are used in the scanning.	211	Added by DJM 12 2021	12/22/21, 12:00 AM
View Edit Delete	US10998041B1	In one embodiment, a read scan operation may scan candidate read levels 1112 in a predefined order. For example, the predefined order may alternate between a high threshold voltage candidate read level and low threshold voltage candidate read level (e.g., #24', #26', #23', #27'). In one embodiment, applying a correlation factor to configure second read level window 1104 may include changing the predefined order to a new order based on the correlation factor. For example, suppose a correlation is a negative shift correlation (e.g., negative shift correlation 726). In one embodiment, the read scan operation may be configured to change the predefined order to leverage the negative shift correlation and so the changed order of candidate read levels may be #24', #23', #26', #27'', such that the lower threshold voltage candidates are examined before the higher threshold voltage candidates. In another example, if a correlation indicates a strong likelihood that a memory state may experience widening, the outermost candidates may be used first, and the scan may work its way inward.	212	Added by DJM 12 2021	12/22/21, 12:00 AM
View Edit Delete	US10998041B1	In one embodiment, suppose a correlation indicates a likelihood that a second candidate read level may be more optimal than a first candidate read level. In such an embodiment, a read scan operation may change a predefined order by skipping iteratively testing a first candidate read level in response to the second candidate read level activating the fewest number of memory cells in relation to other candidate read levels within the second read level window 1104.	213	Added by DJM 12 2021	12/22/21, 12:00 AM
View Edit Delete	US10998041B1	In the example of FIG. 11, correlations between one or the other of memory state C and memory state D and one or the other of memory state J and memory state K. In one embodiment, selection of a correlation to use between two states may be based on attributes of the correlations. If the correlations between two states are symmetrical, meaning a correlation from memory state A to memory state J is an inverse of a correlation from memory state J to memory state A, then there are four possible correlations between one or the other of memory state C and memory state D and one or the other of memory state J and memory state K. If the correlations are not symmetrical then there are eight possible correlations.	214	Added by DJM 12 2021	12/22/21, 12:00 AM
View Edit Delete	US10998041B1	In such a situation, the read scan operation may use a correlation that is a most stable correlation between two memory states being considered. "Stable correlation" refers to a correlation that comprises an accuracy rate and/or a set of historical testing or supporting data such that the correlation is true for a majority of instances in the future.	215	Added by DJM 12 2021	12/22/21, 12:00 AM
View Edit Delete	US10998041B1	Based on a stability measure for the possible correlations, a read scan operation may select a first memory state from the two adjacent memory states and a second memory state from the other adjacent memory states associated with the second read level window in response to the first memory state and the second memory state having a stable correlation. In the example illustrated in FIG. 11, between memory states C and D (adjacent memory states) and memory states J and K (other adjacent memory states), there may be between one and eight correlations. If a correlation between memory state C and memory state K is a stable correlation and/or a more stable correlation than other correlations that may be used, the read scan operation may use the correlation between memory state C and memory state K to configure the second read level window 1104.	216	Added by DJM 12 2021	12/22/21, 12:00 AM
View Edit Delete	US10998041B1	FIG. 12 is a block diagram of an exemplary storage device 200. Many of the components comprising the storage device 200 may operate effectively as described with regard to FIG. 1 and FIG. 2. However, the storage device 200 may incorporate a die controller 1202 configured according to one embodiment of the claimed solution. The die controller 1202 may include a state machine 214, a read scan circuit 1204, and a volatile memory 1206. The volatile memory 1206 may be used to access a correlation data structure 1208.	217	Added by DJM 12 2021	12/22/21, 12:00 AM
View Edit Delete	US10998041B1	The non-volatile memory array 206 may be a three-dimensional memory array comprising a number of memory cells. These memory cells may be quad-level cells, such that each memory cell may store four bits of data, as described with regard to FIG. 4 and FIG. 5. The die controller 1202 may be configured to execute storage operations on the memory cells of the non-volatile memory array 206 (three-dimensional memory array).	218	Added by DJM 12 2021	12/22/21, 12:00 AM
View Edit Delete	US10998041B1	The die controller 1202 may cooperate with the read/write circuits 208 to perform memory operations on these memory cells and may include a state machine 214 that provides chip-level control of memory operations. In one embodiment, the read scan circuit 1204 is configured to adjust one or more read levels between memory states. In one embodiment, the read scan circuit 1204 implements a valley search operation to determine whether or not to adjust read levels.	219	Added by DJM 12 2021	12/22/21, 12:00 AM
View Edit Delete	US10998041B1	The read scan circuit 1204 of the die controller 1202 may be configured to iteratively sense a set of memory cells using a first set of candidate read levels until a candidate read level activates a fewest number of memory cells in relation to other candidate read levels within the first set. The read scan circuit 1204 may then determine a first read level for a first memory state based on the candidate read level that activates the fewest number of memory cells.	220	Added by DJM 12 2021	12/22/21, 12:00 AM
View Edit Delete	US10998041B1	A volatile memory 1206 coupled to the read scan circuit 1204 may comprise a correlation data structure 1208 configured to store correlation factors for one or more and potentially each memory state for the set of memory cells. The correlation factors stored in the correlation data structure 1208 may represent correlations between memory states, and multiplying a candidate read level by the correlation factor may modify the candidate read level to account for the correlation.	221	Added by DJM 12 2021	12/22/21, 12:00 AM
View Edit Delete	US10998041B1	The read scan circuit 1204 may in one embodiment be configured to retrieve a correlation between the first memory state and a second memory state. The read scan circuit 1204 may retrieve the correlation from the correlation data structure 1208. Shift correlation table 900 and width correlation table 1000 are two examples of correlation data structure 1208.	222	Added by DJM 12 2021	12/22/21, 12:00 AM

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