Dave's PCF WIP: Paragraphs

Paragraphs

Actions	Matter	Content	Para #	Notes	Modified
View Edit Delete	ONSO3305US - Onsemi346	The two or more bumps may be copper pillars having solder tips.	9	Added by DJM 3 2021	3/3/21, 12:00 AM
View Edit Delete	ONSO3305US - Onsemi346	A pad pitch of the two or more bumps may be substantially 70 microns.	10	Added by DJM 3 2021	3/3/21, 12:00 AM
View Edit Delete	ONSO3305US - Onsemi346	The two or more bumps may include solder balls.	11	Added by DJM 3 2021	3/3/21, 12:00 AM
View Edit Delete	ONSO3305US - Onsemi346	Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side. The semiconductor package may also include an active area on the second side of the die and two or more bumps coupled to a second side of the die on either side of the active area. A first redistribution layer (RDL) may be coupled to each of the two or more bumps and may extend to an edge of the semiconductor die. An optically transmissive lid may be coupled to the semiconductor die through the two or more bumps and the first RDL. The semiconductor package may also include a second redistribution layer (RDL) coupled with the first RDL on the second side of the semiconductor die. The second RDL may extend to the first side of the semiconductor die.	13	Added by DJM 3 2021	3/3/21, 12:00 AM
View Edit Delete	ONSO3305US - Onsemi346	One or more side walls of the semiconductor die may be angled between 85 degrees and 60 degrees from a plane formed by the first side of the semiconductor die.	12	Added by DJM 3 2021	3/3/21, 12:00 AM
View Edit Delete	ONSO3305US - Onsemi346	A width of the scribe lines may be less than 150 microns.	26	Added by DJM 3 2021	3/3/21, 12:00 AM
View Edit Delete	ONSO3305US - Onsemi346	The method may further include forming one or more dams on the first RDL.	25	Added by DJM 3 2021	3/3/21, 12:00 AM
View Edit Delete	ONSO3305US - Onsemi346	The one or more sidewalls of the semiconductor die may be angled between 85 degrees and 60 degrees from a plane formed by the first side of the semiconductor die after etching.	24	Added by DJM 3 2021	3/3/21, 12:00 AM
View Edit Delete	ONSO3305US - Onsemi346	Etching the semiconductor wafer may include angling one or more sidewalls of the semiconductor wafer.	23	Added by DJM 3 2021	3/3/21, 12:00 AM
View Edit Delete	ONSO3305US - Onsemi346	Implementations of methods of forming semiconductor packages may include one, all, or any of the following:	22	Added by DJM 3 2021	3/3/21, 12:00 AM
View Edit Delete	ONSO3305US - Onsemi346	Implementations of semiconductor packages may be formed using implementations of methods for forming semiconductor package. Various method implementations may include: providing an optically transmissive substrate having a first side and a second side and forming a first redistribution layer (RDL) on a first side of the optically transmissive substrate. The first RDL may be formed over one or more scribe lines on the first side of the optically transmissive substrate. The method may also include providing a semiconductor wafer having a first side and a second side. A plurality of active areas may be on the second side of the semiconductor wafer and two or more die pads may be around each of the plurality of active areas. The method may include forming two or more inner bumps on each of the two or more die pads and coupling the second side of the semiconductor wafer to the first side of the optically transmissive substrate. The two or more inner bumps may be coupled on either side of the one or more scribe lines. The method may include thinning the semiconductor wafer to a predetermined thickness and etching the semiconductor wafer to the one or more scribe lines to form a plurality of semiconductor die. The method of forming semiconductor packages may also include singulating through each of the semiconductor die and a metal layer to expose one or more inner terminals of first RDL on the cover glass. The method may also include forming an isolation layer around each of the plurality of semiconductor die. The method may include forming a second redistribution layer (RDL). The second RDL may extend from the inner terminals of the first RDL to the first side of each of the plurality of semiconductor die. The method may include forming a passivation layer over the first side of each of the semiconductor die and singulating through the passivation layer and the optically transmissive substrate to form a plurality of semiconductor packages.	21	Added by DJM 3 2021	3/3/21, 12:00 AM
View Edit Delete	ONSO3305US - Onsemi346	One or more sidewalls of the semiconductor die may be angled between 85 degrees and 60 degrees from a plane formed by the first side of the semiconductor die.	20	Added by DJM 3 2021	3/3/21, 12:00 AM
View Edit Delete	ONSO3305US - Onsemi346	The two or bumps may be coupled to two or more die pads.	15	Added by DJM 3 2021	3/3/21, 12:00 AM
View Edit Delete	ONSO3305US - Onsemi346	an optically transmissive lid coupled to the semiconductor die through an adhesive, the two or more bumps, and a first redistribution layer (RDL); and	70	Added by DJM 3 2021	3/3/21, 12:00 AM
View Edit Delete	ONSO3305US - Onsemi346	a second redistribution layer (RDL) coupled with the first RDL on the second side of the semiconductor die and extending to the first side of the semiconductor die;	71	Added by DJM 3 2021	3/3/21, 12:00 AM
View Edit Delete	ONSO3305US - Onsemi346	wherein the first RDL extends to an edge of the semiconductor die.	72	Added by DJM 3 2021	3/3/21, 12:00 AM
View Edit Delete	ONSO3305US - Onsemi346	2.The semiconductor package of claim 1, wherein a pad pitch of the two or more bumps is substantially 60 microns.	73	Added by DJM 3 2021	3/3/21, 12:00 AM
View Edit Delete	ONSO3305US - Onsemi346	3.The semiconductor package of claim 1, wherein the two or more bumps are copper pillars comprising solder tips.	74	Added by DJM 3 2021	3/3/21, 12:00 AM
View Edit Delete	ONSO3305US - Onsemi346	4.The semiconductor package of claim 3, wherein a pad pitch of the two or more bumps is substantially 70 microns.	75	Added by DJM 3 2021	3/3/21, 12:00 AM
View Edit Delete	ONSO3305US - Onsemi346	5.The semiconductor package of claim 1, wherein the two or more bumps comprise solder balls.	76	Added by DJM 3 2021	3/3/21, 12:00 AM

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