Dave's PCF WIP: Paragraphs

Paragraphs

Actions	Matter	Content	Para #	Notes	Modified
View Edit Delete	US-20150012794-A1	Claim 18.The apparatus of claim 11, wherein data of the at least one ECC block comprises a media access control header for the one or more additional ECC blocks of the non-volatile memory device, the adjustment module configured to determine the one or more media parameters at least partially based on the data of the media access control header.	185	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In various embodiments, a means for deriving analog information may include an analog information module 408, a configuration module 150, a non-volatile memory controller 124, a non-volatile memory media controller 126, a device driver such as an SML 130, a processor 111, a read pipeline 241, other logic hardware and/or other executable code stored on a computer readable storage medium. Other embodiments may include similar or equivalent means for deriving analog information.	115	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	Claim 16.The apparatus of claim 11, further comprising a control loop module configured to iteratively read the at least one ECC block from the non-volatile memory device using adjusted media parameters until the secondary ECC module decodes the at least one ECC block, the adjustment module configured to determine the one or more media parameters based on the adjusted media parameters.	183	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	Claim 15.The apparatus of claim 11, wherein the secondary error correcting code comprises a balanced code and the adjustment module is configured to determine the one or more media parameters based on error information indicating a balance of the at least one ECC block.	182	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	Claim 14.The apparatus of claim 11, wherein the secondary ECC module is configured to decode the at least one ECC block using a soft-decision decoder with the secondary error correcting code.	181	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	Claim 13.The apparatus of claim 11, wherein the adjustment module is configured to determine the one or more media parameters based on error information determined by the secondary ECC module from decoding the at least one ECC block.	180	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	Claim 12.The apparatus of claim 11, wherein the at least one ECC block stores access data comprising the one or more media parameters.	179	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	a primary ECC module configured to decode one or more additional ECC blocks of the non-volatile memory device using a primary error correcting code, the one or more additional ECC blocks read using the one or more media parameters.	178	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	an adjustment module configured to determine one or more media parameters based on decoding the at least one ECC block, the one or more media parameters for reading one or more additional ECC blocks from the non-volatile memory device; and	177	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	a secondary ECC module configured to decode at least one error correcting code (ECC) block of a non-volatile memory device using a secondary error correcting code;	176	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	Claim 11.An apparatus comprising:	175	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In various embodiments, a soft-decision decoder may be useful for decoding various types of secondary/inner error correcting code, such as an LDPC code, BCH code, turbo code, or the like. In one embodiment, the soft decision module 402 may use an iterated soft-decision decoder. In another embodiment, the soft decision module 402 may use a non-iterated soft-decision decoder.	124	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In one embodiment, the DC balance module 404 determines a direction of deviation for a read data set, such as an ECC code word or chunk, a page, a range of logical blocks or segments, or the like. The direction of deviation, in one embodiment, is a difference between the read balance or bias of the data set and a known or expected balance or bias. The direction or difference may be represented as a value, a sign (e.g., positive or negative), a relationship (e.g., greater than, less than), a direction (e.g., up, down), or the like. The DC balance module 404, in certain embodiments, may determine a direction of deviation based on an encoding type used for storage cells of the non-volatile memory media 122, based on a physical and/or electrical architecture of the storage cells of the non-volatile memory media 122, or the like. For example, the DC balance module 404 may examine the balance or bias deviation in the data set to determine a direction of deviation based on a media type (2-bit MLC, 3-bit MLC, n-bit-MLC), which page of a multi-phase programming model was read, an encoding type for the non-volatile memory media 122 (such as a Gray code encoding type, a binary code encoding type, or the like), and/or a magnitude of the determined deviation.	133	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	The difference between the read ratio of binary ones and binary zeroes of an ECC chunk and the expected or known ratio may provide the adjustment module 306 a direction or drift For example, read or write disturb errors may cause a read ECC chunk to exhibit a greater number of binary ones than expected (e.g., a balance shift to the right) while retention errors may cause a read ECC chunk to exhibit a greater number of binary zeroes than expected (e.g., a balance shift to the left). Adjusting media parameters to restore the balance of the ECC chunk may, in a further embodiment, reduce the number of errors in additional ECC chunks storing additional data, if the at least one ECC chunk and the additional ECC chunk are susceptible to the same types of errors.	132	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In some embodiments, using a balanced code as the secondary/inner error correcting code results in a balanced ECC chunk. In certain embodiments, however, the DC balance module 404 may determine that a read ECC chunk encoded has become unbalanced, or does not exhibit an expected ratio of binary ones and binary zeroes, due to errors or the like. In one embodiment, the adjustment module 306 may adjust one or more media parameters based on error information from the DC balance module 404, to restore the balance of the at least one ECC chunk.	131	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In some embodiments, information about the “DC balance,” “balance,” or “bias” of an ECC chunk, or code word may refer to any information reflecting how similar the code word is to a known “balanced” or “biased” code word with a known or expected ratio of binary zeroes and binary ones, such as an equal number of ones and zeros. Information about the balance may include any information reflecting the relative quantities or frequencies of zero and one bits in the code word. For example, in one embodiment, information about the balance of a code word may include the mean value of bits in the code word, so that a mean value of 0.5 indicates that the code word is balanced with an equal number of binary ones and binary zeroes. In another embodiment, information about the balance of a code word may include a ratio of the number of ones to the number of zeros in the code word, so that a ratio of 1 indicates that the code word is balanced. In certain embodiments, a measurement of the “whiteness” of the code word, or its similarity to random noise, may also provide information about the balance of the code word.	130	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In various embodiments, a balanced code may be any error correcting code where each code word includes a known ratio or range of ratios of binary zero and binary one bits, such as an equal number of binary zeroes and binary ones or the like. In certain embodiments, the secondary/inner error correcting code may be a balanced code from the Reed-Muller family, such as a Walsh-Hadamard or Hadamard code. In some embodiments, a balanced code may generate a code word many times longer than the encoded data. Thus, using a balanced code for the secondary/inner error correcting code may result in encoding a small number of bits very reliably, increasing the likelihood of the secondary ECC module 304 obtaining useful error information by successfully decoding the at least one ECC chunk with the secondary/inner error correcting code.	129	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In one embodiment, the secondary ECC module 304 includes a direct current (DC) balance module 404. In a further embodiment, the secondary, inner error correcting code may include a balanced code, and the DC balance module 404 may determine information about a balance or bias of the at least one ECC chunk encoded with multiple error correcting codes. In a certain embodiment, the error information described above may include the information about the balance or bias of the at least one ECC chunk, from the DC balance module 404 or the like.	128	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In various embodiments, the soft decision module 402 may be implemented in hardware such as the non-volatile memory media controller 126, in software, such as the SML 130 or a program running on processor 111, or as a combination of hardware and software. For example, in one embodiment, the soft decision module 402 may invoke a hardware soft-decision decoder, but may invoke a more computationally-intensive soft-decision decoder in software if the hardware soft-decision decoder is unable to correct the at least one ECC chunk. Using multiple decoders, including a hard-decision decoder and/or multiple soft-decision decoders for the soft decision module 402, allows the secondary ECC module 304 to decode ECC chunks with fewer errors quickly using a simpler decoder and to decode ECC chunks with more errors using a more complex decoder.	127	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In one embodiment, the secondary ECC module 304 may use a hard-decision decoder that uses no soft information, in connection with the soft-decision decoder used by the soft decision module 402. In some embodiments, the soft-decision decoder may be able to correct more errors in an ECC chunk than the hard-decision decoder, but the soft-decision decoder may use more time and/or computational resources than the hard-decision decoder. In further embodiments, the secondary ECC module 304 may use the hard-decision decoder to attempt to decode the at least one ECC chunk, and may activate the soft decision module 402 in response to determining that the at least one ECC chunk is uncorrectable using the hard-decision decoder with the secondary/inner error correcting code.	126	Added by DJM 2 2021	2/22/21, 12:00 AM

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