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"Volatile memory media" refers to any hardware, device, component, element, or circuit configured to maintain an alterable physical characteristic used to represent a binary value of zero or one for which the alterable physical characteristic reverts to a default state that no longer represents the binary value when a primary power source is removed or unless a primary power source is used to refresh the represented binary value. Examples of volatile memory media include but are not limited to dynamic random-access memory (DRAM), static random-access memory (SRAM), double data rate random-access memory (DDR RAM) or other random-access solid-state memory. |
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It will be readily apparent to one of ordinary skill in the art that the computing device 1500 may be a device such as a smartphone, a desktop computer, a laptop computer, a rack-mounted computer system, a computer server, or a tablet computer device. As commonly known in the art, the computing device 1500 may be implemented as a collection of multiple networked computing devices. Further, the computing device 1500 will typically include operating system logic (not illustrated) the types and nature of which are well known in the art. |
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The term "configured to" is not intended to mean "configurable to." An unprogrammed FPGA, for example, would not be considered to be "configured to" perform some specific function, although it may be "configurable to" perform that function after programming. |
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Within this disclosure, different entities (which may variously be referred to as "units," "circuits," other components, etc.) may be described or claimed as "configured" to perform one or more tasks or operations. This formulation--[entity] configured to [perform one or more tasks]--is used herein to refer to structure (i.e., something physical, such as an electronic circuit). More specifically, this formulation is used to indicate that this structure is arranged to perform the one or more tasks during operation. A structure can be said to be "configured to" perform some task even if the structure is not currently being operated. A "credit distribution circuit configured to distribute credits to a plurality of processor cores" is intended to cover, for example, an integrated circuit that has circuitry that performs this function during operation, even if the integrated circuit in question is not currently being used (e.g., a power supply is not connected to it). Thus, an entity described or recited as "configured to" perform some task refers to something physical, such as a device, circuit, memory storing program instructions executable to implement the task, etc. This phrase is not used herein to refer to something intangible. |
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Terms used herein should be accorded their ordinary meaning in the relevant arts, or the meaning indicated by their use in context, but if an express definition is provided, that meaning controls. |
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As used herein, the term "based on" is used to describe one or more factors that affect a determination. This term does not foreclose the possibility that additional factors may affect the determination. That is, a determination may be solely based on specified factors or based on the specified factors as well as other, unspecified factors. Consider the phrase "determine A based on B." This phrase specifies that B is a factor that is used to determine A or that affects the determination of A. This phrase does not foreclose that the determination of A may also be based on some other factor, such as C. This phrase is also intended to cover an embodiment in which A is determined based solely on B. As used herein, the phrase "based on" is synonymous with the phrase "based at least in part on." |
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The output device(s) 1510 include devices and mechanisms for outputting information from the data processing system 1502. These may include a graphical user interface, speakers, printers, infrared LEDs, and so on, as well understood in the art. In certain embodiments, a graphical user interface is coupled to the bus subsystem 1516 directly by way of a wired connection. In other embodiments, the graphical user interface couples to the data processing system 1502 by way of the communication network interface 1506. For example, the graphical user interface may comprise a command line interface on a separate computing device 1500 such as desktop, server, or mobile device. |
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The input device(s) 1508 include devices and mechanisms for inputting information to the data processing system 1502. These may include a keyboard, a keypad, a touch screen incorporated into a graphical user interface, audio input devices such as voice recognition systems, microphones, and other types of input devices. In various embodiments, the input device(s) 1508 may be embodied as a computer mouse, a trackball, a track pad, a joystick, wireless remote, drawing tablet, voice command system, eye tracking system, and the like. The input device(s) 1508 typically allow a user to select objects, icons, control areas, text and the like that appear on a graphical user interface via a command such as a click of a button or the like. |
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"Non-volatile memory" refers to shorthand name for non-volatile memory media. In certain embodiments, non-volatile memory media refers to the non-volatile memory media and the logic, controllers, processor(s), state machine(s), and/or other periphery circuits that manage the non-volatile memory media and provide access to the non-volatile memory media. |
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While the volatile memory media is referred to herein as "memory media," in various embodiments, the volatile memory media may more generally be referred to as volatile memory. |
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The communication network interface 1506 provides an interface to communication networks (e.g., communication network 1504) and devices external to the data processing system 1502. The communication network interface 1506 may serve as an interface for receiving data from and transmitting data to other systems. Embodiments of the communication network interface 1506 may include an Ethernet interface, a modem (telephone, satellite, cable, ISDN), (asynchronous) digital subscriber line (DSL), FireWire, USB, a wireless communication interface such as Bluetooth or WiFi, a near field communication wireless interface, a cellular interface, and the like. |
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"Volatile memory" refers to a shorthand name for volatile memory media. In certain embodiments, volatile memory refers to the volatile memory media and the logic, controllers, processor(s), state machine(s), and or other periphery circuits that manage the volatile memory media and provide access to the volatile memory media. |
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In one embodiment, the storage subsystem 1514 includes a volatile memory 1518 and a non-volatile memory 1520. The volatile memory 1518 and/or the non-volatile memory 1520 may store computer-executable instructions that alone or together form logic 1522 that when applied to, and executed by, the processor(s) 1512 implement embodiments of the processes disclosed herein. |
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While the non-volatile memory media is referred to herein as "memory media," in various embodiments, the non-volatile memory media may more generally be referred to as non-volatile memory. Because non-volatile memory media is capable of storing data when a power supply is removed, the non-volatile memory media may also be referred to as a recording media, non-volatile recording media, storage media, storage, non-volatile memory, volatile memory medium, non-volatile storage medium, non-volatile storage, or the like. |
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"Storage device" or "memory device" refers to any hardware, system, sub-system, circuit, component, module, non-volatile memory media, hard disk drive, storage array, device, or apparatus configured, programmed, designed, or engineered to store data for a period of time and retain the data in the storage device while the storage device is not using power from a power supply. Examples of storage devices include, but are not limited to, a hard disk drive, FLASH memory, MRAM memory, a Solid-State storage device, Just a Bunch Of Disks (JBOD), Just a Bunch Of Flash (JBOF), an external hard disk, an internal hard disk, and the like. |
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The processor(s) 1512 communicate with a number of peripheral devices via a bus subsystem 1516. These peripheral devices may include input device(s) 1508, output device(s) 1510, communication network interface 1506, and the storage subsystem 1514. The storage subsystem 1514, in one embodiment, comprises one or more storage devices and/or one or more memory devices. |
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As depicted in FIG. 15, the data processing system 1502 may include one or more processor(s) 1512 and a storage subsystem 1514. "Processor" refers to any circuitry, component, chip, die, package, or module configured to receive, interpret, decode, and execute machine instructions. "Instructions" refers to symbols representing commands for execution by a device using a processor, microprocessor, controller, interpreter, or other programmable logic. Broadly, `instructions` can mean source code, object code, and executable code. "Instructions" herein is also meant to include commands embodied in programmable read-only memories (EPROM) or hard coded into hardware (e.g., "micro-code") and like implementations wherein the instructions are configured into a machine read-only memory or other hardware component at manufacturing time of a device. Examples of a processor may include, but are not limited to, a central processing unit, a general-purpose processor, an application-specific processor, a graphics processing unit (GPU), a field programmable gate array (FPGA), Application Specific Integrated Circuit (ASIC), System on a Chip (SoC), virtual processor, processor core, and the like. |
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In block 1406, the read scan circuit may scan the second read level window for a second candidate read level that activates the fewest number of memory cells in relation to other candidate read levels within the second read level window. Once the first candidate read level and second candidate read level are determined by the read scan circuit, in block 1408, the read scan circuit may configure a read operation to use the first candidate read level and the second candidate read level. |
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In block 1404, the read scan circuit may configure a second read level window for a second candidate read level based on a correlation. The correlation is between at least one of the two adjacent memory states and one or more other adjacent memory states associated with the second read level window. |
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FIG. 14 illustrates a method for conducting a read scan operation 1400 in accordance with one embodiment. At block 1402, a read scan circuit may scan a first read level window for a first candidate read level that activates the fewest number of memory cells in relation to other candidate read levels within the first read level window. The first read level window may test read levels between two adjacent memory states. |
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