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Delete 		ONSO3305US - Onsemi346 Background 4 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 Aspects of this document relate generally to semiconductor packages, such as image sensor packages for use in cameras, cell phones, and similar devices. More specific implementations involve image sensor chip scale packages. 3 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 FIG. 7 is a side view of an implementation of an optically transmissive substrate coupled to an implementation of a semiconductor wafer; 36 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 FIG. 16 is a side view of an implementation of semiconductor die coupled to an implementation of an optically transmissive substrate after forming a passivation layer; 45 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 FIG. 15 is a close-up view of an implementation of the first RDL coupled with the second RDL; 44 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 FIG. 14 is a side view of an implementation of semiconductor die coupled to an implementation of an optically transmissive substrate after formation of a second redistribution layer (RDL); 43 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 FIG. 13 is a side view of an implementation of semiconductor die coupled to an implementation of an optically transmissive substrate after forming an isolation layer around the plurality of semiconductor die; 42 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 FIG. 12 is a close-up view of an implementation of an exposed redistribution layer (RDL); 41 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 FIG. 11 is a side view of an implementation of semiconductor die coupled to an implementation of an optically transmissive substrate after exposing one or more inner terminals of first RDL on the cover glass; 40 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 FIG. 10 is a side view of an implementation of an optically transmissive substrate coupled to an implementations of semiconductor die after silicon etching; 39 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 FIG. 9 is a side view of an implementation of an optically transmissive substrate coupled to an implementation of a semiconductor wafer after wafer thinning; 38 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 FIG. 8 is a close-up view of an implementation of an inner bump joint coupled between an implementation of an optically transmissive substrate and an implementation of a semiconductor wafer; 37 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 1.Technical Field 2 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 FIG. 6 is a side view of an implementation of a semiconductor wafer after bump formation; 35 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 FIG. 5 is a side view of an implementation of an optically transmissive substrate after dam formation; 34 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 FIG. 4 is a top view of an implementation of an optically transmissive substrate having first redistribution layers on the saw streets; 33 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 FIG. 3 is a side view of an implementation of an optically transmissive substrate; 32 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 FIG. 2 is a close-up of an implementation of an electrical interconnection route; 31 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 FIG. 1 is a cross sectional view of an implementation of a semiconductor package without through silicon vias (TSVs); 30 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 Implementations will hereinafter be described in conjunction with the appended drawings, where like designations denote like elements, and: 29 Added by DJM 3 2021 3/3/21, 12:00 AM

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