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Dave's PCF WIP: Paragraphs
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Delete 		ONSO3305US - Onsemi346 etching the semiconductor wafer to the one or more scribe lines to form a plurality of semiconductor die; 98 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 20.The method of claim 14, wherein each of the two or more die pads comprise a pad pitch of substantially 70 microns. 109 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 19.The method of claim 14, wherein each of the two or more die pads comprise a pad pitch of substantially 60 microns. 108 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 18.The method of claim 14, wherein a width of the scribe lines is less than 150 microns. 107 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 17. The method of claim 14, further comprising forming one or more dams on the first redistribution layer. 106 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 16.The method of claim 15, wherein the one or more sidewalls of the semiconductor die are angled between 85 degrees and 60 degrees from a plane formed by the first side of the semiconductor die. 105 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 15. The method of claim 14, wherein etching comprises angling one or more sidewalls of the semiconductor wafer. 104 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 singulating through the passivation layer and the optically transmissive substrate to form a plurality of semiconductor packages. 103 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 forming a passivation layer over the first side of each of the semiconductor die; and 102 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 forming a second redistribution layer (RDL), the second RDL extending from the inner terminals of the first RDL to the first side of each of the plurality of semiconductor die; 101 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 forming an isolation layer around each of the plurality of semiconductor die; 100 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 singulating through each of the semiconductor die and a metal layer to expose one or more inner terminals of first RDL on the cover glass; 99 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 10.The semiconductor package of claim 7, wherein the two or more bumps are copper pillars comprising solder tips. 87 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 thinning the semiconductor wafer to a predetermined thickness; 97 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 coupling the second side of the semiconductor wafer to the first side of the optically transmissive substrate, wherein the two or more inner bumps are coupled on either side of the one or more scribe lines; 96 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 forming two or more inner bumps on each of the two or more die pads 95 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 providing a semiconductor wafer comprising a first side and a second side, wherein a plurality of active areas is comprised on the second side of the semiconductor wafer and two or more die pads are comprised around each of the plurality of active areas; 94 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 forming a first redistribution layer (RDL) on a first side of the optically transmissive substrate, the first RDL comprised over one or more scribe lines comprised on the first side of the optically transmissive substrate; 93 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 providing an optically transmissive substrate comprising a first side and a second side; 92 Added by DJM 3 2021 3/3/21, 12:00 AM
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Delete 		ONSO3305US - Onsemi346 14.A method of forming a semiconductor package, the method comprising: 91 Added by DJM 3 2021 3/3/21, 12:00 AM

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