Dave's PCF WIP: Paragraphs

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View Edit Delete	US-8380915-A1	FIG. 6B is a schematic block diagram illustrating one embodiment of an array 650 of N storage elements 606 in accordance with the present invention. The array 650, in the depicted embodiment, is substantially similar to the array 600 of FIG. 6A, but with the ECC chunk 652 including data 612a in a single storage element 606a, instead of across several storage elements 606a-n. In one embodiment, ECC checkbits for the ECC chunk 652 are stored in the single storage element 606a. Because each storage element 606a-n or channel 604a-n has separate ECC checkbits, in one embodiment, the ECC module 412 uses the separate ECC checkbits to determine in which storage elements 606a-n or channels 604a-n an error has occurred, and the configuration module 352 adjusts the read voltage thresholds of the particular storage element(s) 606 determined by the ECC module 412.	281	Added by DJM 3 2021	3/12/21, 12:00 AM
View Edit Delete	US-8380915-A1	Consequently, the number of combinations that may need to be attempted changes from 17,644 where x=2 to 32 and from 1,036,288 where x=3 to 256, because the configuration module 352 uses the known bias to determine which channels have read voltage thresholds that need adjusting and the direction of the adjustment. However, each of these combinations may not need to be tried because as the adjustments are iteratively made, the known bias of the data continues to indicate which direction to make each subsequent adjustment, potentially cutting the search space at least in half with each iteration. Various search algorithms can be used to quickly identify a suitable adjusted read voltage threshold. (i.e. a binary search).	280	Added by DJM 3 2021	3/12/21, 12:00 AM
View Edit Delete	US-8380915-A1	Using equation 1, for example, if there are twenty-four channels 606a-n (η=24), eight possible read voltage threshold settings for each channel 606 (λ=8), and only two of the twenty-four channels 606a-n have read voltage thresholds that need to be adjusted (x=2), there are 17,644 total different combinations of read voltage threshold settings. If the number of channels 606 with read voltage thresholds that need adjusting increases to three, the number of different combinations increases to 1,036,288. The configuration module 352 drastically reduces these numbers by detecting which channels 606a-n have read voltage thresholds that need adjusting. In addition, comparing the known bias of the data on the media in a storage grouping to the current bias indicates the direction to adjust the read voltage thresholds. Knowing the direction in which to adjust the read voltage threshold greatly reduces the search space for a suitable voltage in the channels known to have a data error.	279	Added by DJM 3 2021	3/12/21, 12:00 AM
View Edit Delete	US-8380915-A1	The number of different combinations of read voltage threshold settings for the array 600 with all permutations of up to η channels 604a-n, in one embodiment is given by equation 2:g(x,η,λ)=Σi=1x(i,η,λ) (2)	278	Added by DJM 3 2021	3/12/21, 12:00 AM
View Edit Delete	US-8380915-A1	To illustrate the potential size of the search space for a suitable adjusted read voltage threshold, suppose an ECC chunk 616 (i.e. ECC code word—comprising both data and the corresponding ECC checkbits) is stored on the storage elements 606a-606n. Further suppose that the storage elements 606a-606n in a row of the array 600 that stores the ECC chunk 616 each have an independent adjustable read voltage threshold. For example, in one embodiment, the number of different combinations of read voltage threshold settings for the array 600 with η channels 604a-n, λ number of levels at which the read voltage threshold can be set per channel, and x number of channels that have a read voltage threshold that needs to be adjusted is given by equation 1:f(x,η,λ)=(xη)·λx (1)	277	Added by DJM 3 2021	3/12/21, 12:00 AM
View Edit Delete	US-8380915-A1	The media characteristic module 502, in certain embodiments, manages the collection of and/or maintenance of storage media characteristics. The media characteristic module 502 may maintain storage media characteristics in and/or retrieve storage media characteristics from a storage media characteristic repository. One example of a storage media characteristic repository is described in greater detail below with regard to FIGS. 7A and 7B. The media characteristic module 502, in certain embodiments, references, determines, and/or manages storage media characteristics for several different sets of storage cells, such as each storage media region or storage media division of the solid-state storage device 102. A storage media region may include an erase block (logical or physical), a page, a logical page, an ECC chunk, a division within a page, a die, a die plane, a chip, or the like.	245	Added by DJM 3 2021	3/12/21, 12:00 AM
View Edit Delete	US-8380915-A1	In one embodiment, the deviation module 404, the ECC module 412, and/or the distribution module 414 determines that a data set has an error or a read bias that deviates from the known bias, and the data set source module 422 determines from which storage element 606 the data set was read. For example, in one embodiment, the array 600 may have 24 channels 604, and 8 bytes may be read in parallel from 24 storage elements 606 of a single bank 602 during a read operation for a total of 192 bytes per read operation. Based on this information, the data set source module 422, in one embodiment, can determine from which storage element 606 a data set was read based on the position of an 8 byte data set within the 192 bytes. In one embodiment, the 192 bytes comprise the ECC chunk 616.	275	Added by DJM 3 2021	3/12/21, 12:00 AM
View Edit Delete	US-8380915-A1	Because, in the depicted embodiment, the ECC checkbits for the ECC chunk 616 are distributed across several storage elements 606a-n and channels 604a-n, when a data error occurs due to a read voltage shift in one or more of the storage elements 606a-n, the ECC module 412 may not be able to determine which storage elements 606 have an error that is correctable by adjusting the read voltage threshold. In one embodiment, the distribution module 414 determines which storage elements 606 or channels 604 have data with a read bias that is outside an expected distribution of the known bias, and the configuration module 352 adjusts the read voltage thresholds of the storage elements 606 determined by the distribution module 414.	274	Added by DJM 3 2021	3/12/21, 12:00 AM
View Edit Delete	US-8380915-A1	In one embodiment, the ECC is a block code that is distributed with the data. Furthermore, the data and the ECC may not align with any particular physical hardware boundary. As a result, error correction with the ECC codes is not dependent on a particular hardware configuration. Therefore, the ECC and corresponding data may form an ECC chunk 616 and the ECC chunk may be divided and stored on one or more of the N storage elements 606a-n. An ECC chunk 616 typically spans at least a portion of a plurality of physical pages 610 of a logical page where the data and ECC generated from the data 612a, 612b, . . . 612m are spread across the N storage elements 606a-n. In one embodiment, a LP includes a plurality of ECC chunks 616. A physical page 610 may contain one or more data bytes of the ECC chunk 616. An ECC chunk 616 may span multiple rows within a physical page 610 and a physical page 610 may include a plurality of ECC chunks 616.	273	Added by DJM 3 2021	3/12/21, 12:00 AM
View Edit Delete	US-8380915-A1	In one embodiment, a group of PEBs (PEB 1608a-PEB m 608m) forms a logical erase block (“LEB”). An LEB spans the array of N storage elements 600. Furthermore, in an embodiment, a logical page (“LP”) spans a plurality of physical pages 610 in a row. In another embodiment a logical page spans N storage elements 606a-n.	272	Added by DJM 3 2021	3/12/21, 12:00 AM
View Edit Delete	US-8380915-A1	Furthermore, in one embodiment each storage element 606 includes a physical erase block or “PEB” 608. For example, storage element one 606a includes PEB one 608a. A physical erase block is typically an erase block located on one die, chip, or other storage element 606. Each PEB 608 includes m physical pages 610. For example, PEB one 608a includes page 0610a . . . page m 614a. Each physical page 610a stores a portion of data (“D 0, D 1, . . . , D m”) 612 and ECC checkbits distributed with the data 612.	271	Added by DJM 3 2021	3/12/21, 12:00 AM
View Edit Delete	US-8380915-A1	The array 600 of storage elements 606, in one embodiment, includes N number of storage elements 606a, 606b, 606c, . . . 606n. Each storage element 606 may comprise a device, a chip, a portion of a chip, a die, or the like. In the depicted embodiment, the storage elements 606a-n form a bank 602a. The array 600, in one embodiment, includes several banks 602a . . . 602m. The banks 602a-m, in the depicted embodiment, include several channels 604a, 604b, 604c, . . . , 604n. In one embodiment, a packet or data set is written across the several channels 604a-n and data is read separately from each channel 604a-n and reassembled into the packet. In another embodiment, an ECC chunk 616, packet, or data set is written across the several channels 604a-n and data is read in parallel from all the channels 604a-n. One read operation on a bank 602a may read a whole ECC chunk 616, packet, or data set or a portion of an ECC chunk 616, packet, or data set that is reassembled into a whole ECC chunk 616, packet, or data set. In the depicted embodiment, each channel includes at least one storage element 606 in each bank 602.	270	Added by DJM 3 2021	3/12/21, 12:00 AM
View Edit Delete	US-8380915-A1	FIG. 6A is a schematic block diagram illustrating one embodiment of an array 600 of N number of storage elements 606 in accordance with the present invention. In the depicted embodiment, an ECC chunk 616 includes data 612 from several storage elements 606. In a further embodiment, ECC checkbits for the ECC chunk 616 are also stored across several storage elements 606.	269	Added by DJM 3 2021	3/12/21, 12:00 AM
View Edit Delete	US-8380915-A1	The adaptive configuration module 512, in various embodiments, may dynamically adjust or adapt a data refresh interval based on an age (in absolute time, in powered-on time, in an amount of user data written, or the like) of the solid-state storage device 102, a read disturb threshold (i.e. a number of read operations before data is refreshed to mitigate effects of read disturb) based on wear of the solid-state storage device 102, an erase block retirement policy based on an age of the solid-state storage device 102, a garbage collection method for the solid-state storage device 102 based on host workload, garbage collection by zone of the solid-state storage device 102 based on levels of extent activity to minimize stir between active and inactive data, scrubbing intervals to increase scrubbing as the solid-state storage device 102 ages, or the like.	268	Added by DJM 3 2021	3/12/21, 12:00 AM
View Edit Delete	US-8380915-A1	In solid-state storage media 110, an effect called read disturb can occur in unselected storage cells when adjacent storage cells are selected and read, causing charge to collect on the floating gates of the unselected storage cells making the unselected storage cells have an increased voltage that has not been deliberately applied. One approach to combating the effects of read disturb, is to move valid data out of the disturbed cells while the values in those cells are still determinable. The valid data may be re-written to a new physical location and the disturbed cells are erased to remove the effects of the read disturb. This approach is called a refresh and the time between refresh operations is referred to as a data refresh interval. A read disturb threshold is a number of reads of neighboring cells before remedial action is needed to mitigate the effects of read disturb. A data refresh interval at which storage regions are processed for storage capacity recovery and/or data refresh, that is appropriate for a solid-state storage device 102 near an end of life may be too aggressive for a solid-state storage device 102 at the beginning of use.	267	Added by DJM 3 2021	3/12/21, 12:00 AM

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