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In various embodiments, the solid-state storage device 102 may be in the form of a dual-inline memory module (“DIMM”), a daughter card, or a micro-module. In another embodiment, the solid-state storage device 102 is an element within a rack-mounted blade. In another embodiment, the solid-state storage device 102 is contained within a package that is integrated directly onto a higher level assembly (e.g. mother board, lap top, graphics processor). In another embodiment, individual components comprising the solid-state storage device 102 are integrated directly onto a higher level assembly without intermediate packaging. |
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The solid-state storage device 102 is depicted in a computer 112 connected to one or more clients 114 through a computer network 116. In one embodiment, the solid-state storage device 102 is internal to the computer 112 and is connected using a system communications bus, such as a peripheral component interconnect express (“PCI-e”) bus, a Serial Advanced Technology Attachment (“serial ATA”) bus, or the like. In another embodiment, the solid-state storage device 102 is external to the computer 112 and is connected using an external communications bus, such as a universal serial bus (“USB”) connection, an Institute of Electrical and Electronics Engineers (“IEEE”) 1394 bus (“FireWire”), or the like. In other embodiments, the solid-state storage device 102 is connected to the computer 112 using a communications bus such as a peripheral component interconnect (“PCI”) express bus using external electrical or optical bus extension or bus networking solution such as Infiniband or PCI Express Advanced Switching (“PCIe-AS”), or the like. |
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The system 100 includes at least one solid-state storage device 102. In other embodiments, the system 100 includes two or more solid-state storage devices 102. Each solid-state storage device 102 may include non-volatile, solid-state storage media 110, such as flash memory, nano random access memory (“nano RAM or NRAM”), magneto-resistive RAM (“MRAM”), dynamic RAM (“DRAM”), phase change RAM (“PRAM”), racetrack memory, memristor memory, nanocrystal wire-based memory, silicon-oxide based sub-10 nanometer process memory, graphene memory, silicon-oxide-nitride-oxide-silicon (“SONOS”) memory, resistive random-access memory (“RRAM”), programmable metallization cell (“PMC”), conductive-bridging RAM (“CBRAM”), or the like. The solid-state storage device 102 is described in more detail with respect to FIGS. 2, 3A, and 3B. |
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FIG. 1 is a schematic block diagram illustrating one embodiment of a system 100 for improving the utility of solid-state storage media 110 in accordance with the present invention. The system 100 includes a solid-state storage device 102, a solid-state storage controller 104, a write data pipeline 106, a read data pipeline 108, a solid-state storage media 110, a computer 112, a client 114, and a computer network 116, which are described below. |
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Solid-State Storage System |
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1. Field |
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Furthermore, the described features, structures, or characteristics of the invention may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided, such as examples of programming, software modules, user selections, network transactions, database queries, database structures, hardware modules, hardware circuits, hardware chips, etc., to provide a thorough understanding of embodiments of the invention. One skilled in the relevant art will recognize, however, that the invention may be practiced without one or more of the specific details, or with other methods, components, materials, and so forth. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of the invention. |
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Reference to a computer readable medium may take any form capable of storing machine-readable instructions on a digital processing apparatus memory device. A computer readable medium may be embodied by a compact disk, digital-video disk, a magnetic tape, a Bernoulli drive, a magnetic disk, a punch card, flash memory, integrated circuits, or other digital processing apparatus memory device. |
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Indeed, a module of executable code may be a single instruction, or many instructions, and may even be distributed over several different code segments, among different programs, and across several memory devices. Similarly, operational data may be identified and illustrated herein within modules, and may be embodied in any suitable form and organized within any suitable type of data structure. The operational data may be collected as a single data set, or may be distributed over different locations including over different storage devices, and may exist, at least partially, merely as electronic signals on a system or network. Where a module or portions of a module are implemented in software, the software portions are stored on one or more computer readable media. |
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FIG. 10 is a schematic flow chart diagram illustrating another embodiment of a method for improving the utility of solid-state storage media in accordance with the present invention. |
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FIG. 9 is a schematic flow chart diagram illustrating one embodiment of a method for improving the utility of solid-state storage media in accordance with the present invention; and |
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FIG. 8B is a schematic block diagram illustrating one embodiment of a configuration parameter repository in accordance with the present invention; |
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FIG. 8A is a schematic block diagram illustrating one embodiment of a configuration parameter module and a configuration parameter repository in accordance with the present invention; |
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FIG. 7B is a schematic block diagram illustrating one embodiment of a storage media characteristic repository in accordance with the present invention; |
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FIG. 7A is a schematic block diagram illustrating one embodiment of a media characteristic module and a storage media characteristic repository in accordance with the present invention; |
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FIG. 6D is a schematic block diagram illustrating one embodiment of adjusted configuration parameters for a set of multi-level storage cells of solid-state storage media in accordance with the present invention; |
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The read data pipeline 108 includes a depacketizer 324 that receives ECC blocks of the requested packet from the ECC decoder 322, directly or indirectly, and checks and removes one or more packet headers. The depacketizer 324 may validate the packet headers by checking packet identifiers, data length, data location, etc. within the headers. In one embodiment, the header includes a hash code that can be used to validate that the packet delivered to the read data pipeline 108 is the requested packet. The depacketizer 324 also removes the headers from the requested packet added by the packetizer 302. The depacketizer 324 may directed to not operate on certain packets but pass these forward without modification. An example might be a container label that is requested during the course of a rebuild process where the header information is required for index reconstruction. Further examples include the transfer of packets of various types destined for use within the solid-state storage device 102. In another embodiment, the depacketizer 324 operation may be packet type dependent. |
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For example, in one embodiment, MLC storage cells that store two bits may have three read voltage thresholds, separating binary values of 11, 01, 00, and 10. The three example read voltage thresholds may be x volts, y volts, and z volts, described in greater detail below with regard to the read voltage thresholds 662 of FIG. 6C. If the voltage read from a storage cell falls between Vmin and x volts, a binary 11 state is indicated. In certain embodiments, Vmin may be a negative voltage. If the voltage read from a storage cell falls between x volts and y volts, a binary 01 state is indicated. If the voltage read from a storage cell falls between y volts and z volts, a binary 00 state is indicated. If the voltage read from a storage cell falls between z volts and Vmax volts, a binary 10 state is indicated. |
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For SLC storage cells that store a single binary value, the read voltage threshold is the boundary between a binary one state and a binary zero state. For example, in one embodiment, a storage cell with a read voltage level above the read voltage threshold stores a binary one while a storage cell with a read voltage level below the read voltage threshold stores a binary zero. Other types of storage cells, such as MLC storage cells, may have multiple read voltage thresholds, to distinguish between more than two discrete states. |
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In general, the configuration module 352 sets and adjusts one or more configuration parameters for one or more storage cells from the solid-state storage media 110, such as setting and adjusting read voltage thresholds, resistivity thresholds, programming thresholds, erase thresholds, or the like. A read voltage threshold is a voltage level that separates discrete values stored in the storage cells of the solid-state storage media 110. Different solid-state storage technologies may use different thresholds other than voltages to distinguish between discrete states. Phase change RAM or PRAM, for example, stores data in chalcogenide glass that has different electrical resistivity in different states. For PRAM, the configuration module 352 may determine, set, and/or adjust resistivity thresholds that distinguish between discrete storage states. One of skill in the art, in light of this disclosure, will recognize that the configuration module 352 may determine, set, and adjust resistivity thresholds or other configuration parameters in a substantially similar manner to that described herein with regard to read voltage thresholds. |
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