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US-20150012794-A1 In one embodiment, each repeated message 520 of the access data chunk 504 may be stored on a different physical memory element, such as a chip, die, die plane, or the like. Thus, in a further embodiment, the adjustment module 306 may effectively adjust one or more media parameters for different physical memory elements of the non-volatile memory media 122 based on error information obtained by decoding the access data. For example, in a certain embodiment, the region 500 of FIG. 5A may be a logical erase block that includes physical erase blocks from eight to twenty-four different memory elements. In a further embodiment, the access data chunks 504 stored by the first two ECC chunks 502 in the region 500 may collectively include eight to twenty-four repetitions of the message 520, with each repeated message 520 stored by a different physical memory element. Although the access data 522 is encoded using three error correcting codes in the depicted embodiment, the access data 522 in a further embodiment may be encoded with any number of multiple error correcting codes, with increasing ECC strength and correspondingly wider range of adjustable media parameters. 153 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 FIG. 5B depicts one embodiment of an access data chunk 504. The access data chunk 504, in certain embodiments, may be substantially similar to the access data chunk 504 described above with regard to FIG. 5A. In the depicted embodiment, the access data chunk 504 includes access data 522 encoded with the secondary/inner error correcting code and a repetition error correcting code, as described above. Thus, in the depicted embodiment, the access data chunk 504 includes repeated messages 520 for the repetition error correcting code, so that each message 520 comprises a code word of the secondary/inner error correcting code of the secondary ECC module 304, both of which are also encoded by the primary/outer error correcting code described above with regard to FIG. 5A. In the depicted embodiment, the secondary/inner error correcting code is a systematic error correcting code, so each repeated message 520 includes the unencoded access data 522, plus check bits 524 for the secondary/inner error correcting code. 152 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 In general, the adjustment module 306 may adjust, determine, or set one or more media parameters for the region 500 based on error information from the at least one ECC chunk 502 storing access data 504 with multiple error correcting codes, and/or based on the decoded access data 504 itself. If useful media parameters do not vary much within the region 500, than the adjustment module 306 may use error information or access data 504 from a small number of ECC chunks 502 storing access data 504 to effectively adjust media parameters affecting the remaining user data 506 in a much larger number of ECC chunks 502. Therefore, most ECC chunks 502 in the region 500 may include user data chunks 506, with the access data chunks 504 taking a small amount of the region 500. For example, in one embodiment, the region 500 may be a logical erase block with a capacity of approximately 4,000 KiB, and the access data chunks 504 may use the first two 1 KiB ECC chunks 502 for the region. In different embodiments, however, the region 500 may include a different ratio of user data chunks 506 to access data chunks 504. 151 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 In some embodiments, a header contains information about the additional ECC chunks, or about the data stored on the additional ECC chunks. For example, in some embodiments, a header may include bit maps for retired regions of non-volatile memory media 122, a program count or erase count, a version number, a seed for a pseudorandom number generator used in connection with the data, or the like. 122 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 In the depicted embodiment, ECC chunks 502 containing (or encoding) data other than the access data may be encoded with the primary/outer error correcting code but not with multiple error correcting codes. In the depicted embodiment, each such ECC chunk 502 may include a user data chunk 506 and check bits 508. Because data other than the access data 504 is not encoded with multiple error correcting codes, the user data chunks 506 may include user data, workload data, other data from a storage client 116, or the like. In some embodiments, because the user data chunks 506 may not be encoded with additional error correcting codes, the user data 506 may be decoded more quickly than the encoded access data 504, so the data chunks 506 may be more suitable than the access data chunks 504 for storing user data. Using a single error correcting code for the user data 506, in certain embodiments, may conserve storage capacity of the non-volatile memory media 122, because the single error correcting code may have lower storage capacity overhead (e.g., a higher code rate, fewer check bits 508, 524, or the like). 149 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 In a further embodiment, the primary ECC module 302 may decode the first two ECC chunks 502 using the ECC check bits 508 of the primary/outer error correcting code, returning access data chunks 504, which include the access data encoded with at least the secondary/inner error correcting code. In another embodiment, the primary ECC module 302 may determine that the first two ECC chunks 502 are uncorrectable using the ECC check bits 508 of the primary/outer error correcting code. However, because the primary/outer error correcting code is a systematic code in the depicted embodiment, the primary ECC module 302 may return the access data chunks 504 with uncorrected errors for the use of other modules, such as the secondary ECC module 304 and/or the repetition code module 406 by simply discarding the check bits 508. In a further embodiment, because the access data chunks 504 include the access data encoded with at least the secondary/inner error correcting code, the secondary ECC module 304 and/or additional modules such as the repetition code module 406 may decode the access data chunks 504 despite errors left uncorrected by the primary ECC module 302. Access data chunks 504 are described further below with regard to FIG. 5B and FIG. 5C. 148 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 Access data 500 may be stored in one or more predefined locations in the region 500 of the non-volatile memory device 120, such as the first two ECC chunks 502 in the depicted embodiment. In certain embodiments, the access data 504 for the region 500 may comprise a media access control (MAC) header or erase block opener for the region 500. In the depicted embodiment, the first two ECC chunks 502 store access data 504 encoded with multiple error correcting codes, including the primary/outer error correcting code of the primary ECC module 302, the secondary/inner error correcting code of the secondary ECC module 304, and the repetition error correcting code of the repetition code module 406 as depicted in FIG. 5B, while the remaining ECC chunks 502 store user data 506 encoded with the primary/outer error correcting code. 147 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 In certain embodiments, the at least one ECC chunk 502 storing access data 504, the first two ECC chunks 502 in the depicted embodiment, may be encoded or protected by a stronger error correcting code, multiple levels of error correcting codes, or the like as described above, while the one or more ECC chunks 502 storing user data 506 may be encoded or protected by a weaker error correcting code, a single error correcting code, or the like. As described above, the access data 504 may include metadata, settings, and/or thresholds which the non-volatile memory controller 124, the non-volatile memory media controller 126, a device driver such as the SML 130, or the like may use to access (e.g., read, write, program, and/or erase) a region 500 of the non-volatile memory media 122. Access data 504 may include one or more media parameters or storage thresholds as described above, a program/erase cycle count for the region of non-volatile memory media 122, an age of the non-volatile memory media 122, a table with multiple media parameters or storage thresholds, a logical-to-physical mapping for data of a region of non-volatile memory media 122, validity metadata or a validity bitmap for data of a region of non-volatile memory media 122, or other information associated with accessing data of a region 500 of non-volatile memory media 122. 146 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 In various embodiments, the depicted region 500 of the non-volatile memory media 122 may include a physical or logical page, physical or logical erase block, chip, die, plurality of chips or dies, or the like. In one embodiment, each ECC chunk 502 comprises a code word from the primary, or outer error correcting code of the primary ECC module 302. In the depicted embodiment, the primary/outer error correcting code is a systematic code, so each ECC chunk 502 includes ECC check bits 508 plus a payload or other information received by an encoder for the primary/outer error correcting code, such as an access data chunk 504 or user data chunk 506. In the depicted embodiment, the first two ECC chunks 502 of the storage region 500 comprise encoded access data chunks 504, while the remaining ECC chunks 502 of the storage region 500 comprise encoded user data chunks 506, with user data, workload data, or the like from storage clients 116. 145 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 FIG. 5A depicts a region 500 of the non-volatile memory media 122 including ECC chunks 502. In the depicted embodiment, each ECC chunk 502 includes an access data chunk 504 or a user data chunk 506, as well as ECC check bits 508. 144 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 In another embodiment, the adjustment module 306 uses a search algorithm to determine the read voltage threshold or other media parameter based on the direction of deviation. For example, the range of voltages in the direction of deviation from the current read voltage threshold may be the search space for the search algorithm. The adjustment module 306, in one embodiment, may use a linear search, a binary search, or the like to determine the read voltage threshold. To check each step as part of the search algorithm, the read pipeline 241 may re-read the data set in response to each adjustment, and the DC balance module 404 may re-determine whether the read balance/bias of the re-read data set deviates from the known balance/bias. The DC balance module 404 may re-determine a direction of deviation for the re-read data set to further the search. The adjustment module 306 may iteratively readjust the read voltage threshold or other media parameter, as described with regard to the control loop module 410, based on the re-determined direction of deviation until the DC balance module 404 determines that the read balance/bias of a re-read data set does not deviate from the known balance/bias, or until each of the read voltage threshold levels have been tested, and/or until the data set can be corrected using the primary error correcting code, or the like. 143 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 In certain embodiments, the adjustment module 306 may determine an amount to adjust the read voltage threshold or other media parameter based on an amplitude of the direction or amplitude of the difference determined by the DC balance module 404. In another embodiment, the adjustment module 306 may scale or otherwise adjust the amplitude from the DC balance module 404 and adjust the read voltage threshold the adjusted amount. For example, the adjustment module 306, in one embodiment, may adjust the read voltage threshold by several adjustment levels in a single adjustment, based on the amplitude of the direction. In a further embodiment, the adjustment module 306 may select an amount to adjust the read voltage threshold based on additional factors such as age, amount of wear, usage history, error history, or other aspects of the non-volatile memory media 122. 142 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 In various embodiments, the secondary error correcting code may comprise one of various types of error correcting codes, such as a block code, a convolutional code, a Bose-Chaudhuri-Hocquenghem (BCH) code, a low-density parity check (LDPC) code, a Hamming code, a turbo code, a Reed-Solomon code, a Walsh-Hadamard code, a Hadamard code, another code from the Reed-Muller family, or the like. In a certain embodiment, the secondary error correcting code may include a repetition error correcting code or replication error correcting code. As described below, a replication or repetition error correcting code may repeat a message multiple times to increase the probability that a majority of the repeated messages will be correct. In one embodiment, the secondary error correcting code may be a systematic code, so that each code word for the secondary error correcting code stores data received by an encoder for the secondary error correcting code, as well as parity bits, or check bits. In another embodiment, the secondary error correcting code may be a non-systematic code, so that the data as originally received by an encoder for the secondary error correcting code may not appear in the code word. 94 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 In some embodiments, the adjustment module 306 may adjust a media parameter that is modifiable by way of an interface. The interface may comprise a publicly known interface or a proprietary interface and may include use of particular command instructions and/or use of particular parameters, register settings, driver settings, controller settings, a particular set of command instruction sequences, or other differences from regular commands (general purpose commands) or settings used to interface with or manage the set of storage cells for the non-volatile memory media 122. 103 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 The adjustment module 306 may adjust a media parameter once during initialization of the non-volatile memory media 122, dynamically with each command issued to the non-volatile memory media 122, or during operation of the non-volatile memory media 122 in response to triggers such as events or time intervals. The non-volatile memory controller 124, in one embodiment, proactively sets one or more media parameters for the non-volatile memory media 122 to improve the utility of the non-volatile memory media 122, to reduce errors, and the like. 102 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 In various embodiments, the adjustment module 306 may adjust, set, or otherwise determine one or more media parameters that affect various regions of non-volatile memory media 122. For example, the adjustment module 306 may adjust a media parameter for a physical or logical page, physical or logical erase block, chip, die, plurality of chips or dies, or the like, without affecting other regions of non-volatile memory media 122 for a non-volatile memory device 120. In another embodiment, the adjustment module 306 may adjust a media parameter that affects the non-volatile memory device 120 as a whole. 101 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 In one embodiment, the adjustment module 306 may adjust individual media parameters separately. In another embodiment, the adjustment module 306 may adjust multiple media parameters together. For example, in a certain embodiment, the non-volatile memory media 122 may include storage cells which encode multiple bits per cell using multiple states per cell, separated by read voltage thresholds. In a further embodiment, multi-level cell (MLC) Flash memory may store two bits per cell by using four states per cell, separated by three read voltage thresholds. An error may occur if a voltage level for the cell drifts from one state past a read voltage threshold into an adjacent state. Such errors may occur due to read disturbs, program disturbs, stress-induced leakage current, or other phenomena that may affect the stored charge, or voltage level, of a Flash memory cell. If the error information suggests drifting voltage levels, the adjustment module 306 may compensate by adjusting individual read voltage thresholds, or by adjusting the three read voltage thresholds together, depending on if the amount of voltage drift is similar or different for each state. 100 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 In various embodiments, a media parameter may include one or more storage thresholds, such as one or more read voltage thresholds, a bias for multiple read voltage thresholds, a resistivity threshold, a programming threshold, an erase threshold, a hardware driver level threshold, a storage controller level threshold, or the like. A read voltage threshold is a voltage level that separates discrete values stored in storage cells of the non-volatile memory media 122. Different non-volatile memory technologies may use different thresholds other than voltages to distinguish between discrete states. Phase change RAM or PRAM, for example, stores data in chalcogenide glass that has different electrical resistivity in different states. For PRAM, the adjustment module 306 may determine, set, and/or adjust resistivity thresholds that distinguish between discrete storage states. In light of this disclosure, various media parameters are clear that the adjustment module 306 may adjust. Further embodiments of adjusting media parameters are described with reference to the “configuration parameters” of U.S. patent application Ser. No. 13/719,045 entitled “Managing Non-Volatile Media” and filed Dec. 18, 2012 for Robert Wood et al., which is incorporated herein by reference in its entirety. 99 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 In certain embodiments, a media parameter may be a parameter related to or associated with writing, storing, programming, reading, or erasing data using non-volatile memory media 122. Media parameters may relate to writing to, or programming, storage cells of the non-volatile memory media 122, reading from storage cells, erasing storage cells, managing storage cells, device driver or storage controller settings for storage cells, or the like. A media parameter for a set of storage cells may be associated with a device driver such as an SML 130 for the non-volatile memory device 120, with a non-volatile memory controller 124, or the like, and may relate to how the device driver and/or non-volatile memory controller 124 use, manage, and interact with the set of storage cells and/or the non-volatile memory media 122. 98 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 The adjustment module 306, in one embodiment, is configured to determine, adjust, or set one or more media parameters for accessing non-volatile memory media 122. In one embodiment, the adjustment module 306 may determine one or more media parameters based on access data successfully decoded by the primary ECC module 302 and/or the secondary ECC module 304. In a further embodiment, the adjustment module 306 may determine one or more media parameters based on error information determined by the primary ECC module 302 and/or the secondary ECC module 304 through decoding or attempting to decode one or more ECC chunks. In one embodiment, the adjustment module 306 may adjust one or more media parameters in response to the secondary ECC module 304 determining that at least one ECC chunk is correctable using the secondary error correcting code. In various embodiments, a means for adjusting one or more media parameters may include an adjustment module 306, a configuration module 150, a non-volatile memory controller 124, a non-volatile memory media controller 126, a write pipeline 240, a read pipeline 241, other logic hardware and/or other executable code stored on a computer readable storage medium. Other embodiments may include similar or equivalent means for adjusting media parameters. 97 Added by DJM 2 2021 2/22/21, 12:00 AM

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