Dave's PCF WIP: Paragraphs

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Actions	Application	Content	Paragraph Number	Notes	Modified
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View Edit Delete	US-20150012794-A1	In one embodiment, for NAND flash media 122 or the like, a binary zero may be represented by a voltage below a read voltage threshold and a binary one may be represented by a voltage above the read voltage threshold. In one example, a data set may be stored with a known bias of 0.5, representing that the expected balance/bias of the data set should be one half binary ones, or DC balanced. In this example, the data set may be read from the storage cells and may gave a read balance/bias of 0.7, meaning that seventy percent of the data bits are binary ones. To determine the direction of deviation, in one embodiment, the DC balance module 404 subtracts the expected bias, 0.5, from the read bias of the data set, 0.7, for a direction of 0.2. The direction may be the entire result (e.g., “0.2”), the sign of the result (e.g., “positive”), a relationship (e.g., “greater than”), a direction, (e.g., “up”), or another indicator that represents the difference between the expected bias of 0.5 and the read bias of 0.7.	136	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In embodiments where an error bias from the primary ECC module 302 and/or the secondary ECC module 304 is available, the DC balance module 404 may determine the direction of deviation based on one or more bits of the data set that are in error, as indicated by the error bias. An error bias, as used herein, is error information comprising a representation of one or more detected bit errors in a data set. In one embodiment, an error bias includes a location or position of a detected bit error in a data set. In another embodiment, an error bias includes a value for a detected bit error. A value for a detected error may include an error corrected value of a bit in error, an error value of the bit in error, or the like. For example, in one embodiment, primary ECC module 302 and/or the secondary ECC module 304 may provide the DC balance module 404 with an uncorrected data set and an error bias indicating locations of detected bit errors and the DC balance module 404 may determine a deviation from the known balance/bias by inverting or flipping the bits in those locations. In another embodiment, for example, the primary ECC module 302 and/or the secondary ECC module 304 may provide the DC balance module 404 with an error corrected data set and an error bias indicating locations of detected bit errors and the DC balance module 404 may determine a read balance/bias by inverting or flipping the bits in those locations.	135	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	The DC balance module 404, in one embodiment, may determine the direction by subtracting a ratio, proportion, or other representation of the known or expected balance/bias from a representation of the read balance/bias of the data set. For example, in one embodiment, the DC balance module 404 may subtract the proportion of binary ones, zeroes, multi-bit binary symbols, or the like that are expected based on the known balance/bias from the proportion of binary ones, zeroes, multi-bit binary symbols, or the like that are in the read data set. Depending on whether ratios of binary ones are compared or ratios of binary zeroes are compared and whether a high voltage represents a binary one or a binary zero, or other specific architectures of the storage cells, the DC balance module 404 may invert the difference or perform another transform to determine the direction.	134	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In one embodiment, the DC balance module 404 determines a direction of deviation for a read data set, such as an ECC code word or chunk, a page, a range of logical blocks or segments, or the like. The direction of deviation, in one embodiment, is a difference between the read balance or bias of the data set and a known or expected balance or bias. The direction or difference may be represented as a value, a sign (e.g., positive or negative), a relationship (e.g., greater than, less than), a direction (e.g., up, down), or the like. The DC balance module 404, in certain embodiments, may determine a direction of deviation based on an encoding type used for storage cells of the non-volatile memory media 122, based on a physical and/or electrical architecture of the storage cells of the non-volatile memory media 122, or the like. For example, the DC balance module 404 may examine the balance or bias deviation in the data set to determine a direction of deviation based on a media type (2-bit MLC, 3-bit MLC, n-bit-MLC), which page of a multi-phase programming model was read, an encoding type for the non-volatile memory media 122 (such as a Gray code encoding type, a binary code encoding type, or the like), and/or a magnitude of the determined deviation.	133	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	The difference between the read ratio of binary ones and binary zeroes of an ECC chunk and the expected or known ratio may provide the adjustment module 306 a direction or drift For example, read or write disturb errors may cause a read ECC chunk to exhibit a greater number of binary ones than expected (e.g., a balance shift to the right) while retention errors may cause a read ECC chunk to exhibit a greater number of binary zeroes than expected (e.g., a balance shift to the left). Adjusting media parameters to restore the balance of the ECC chunk may, in a further embodiment, reduce the number of errors in additional ECC chunks storing additional data, if the at least one ECC chunk and the additional ECC chunk are susceptible to the same types of errors.	132	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	Because, in certain embodiments, the secondary ECC module 304 may provide stronger error correction capabilities for certain ECC code words, the DC balance module 404 may cooperate with the adjustment module 306 to determine, adjust, or set one or more media parameters, such as read voltage thresholds, based on error information for the ECC code words encoded by the secondary ECC module 304, even if other ECC code words encoded just by the primary ECC module 302 are uncorrectable. In this manner, the adjustment module 306 may adjust one or more media parameters until a number of errors in the ECC code words encoded by the primary ECC module 302 is reduced and become correctable by the primary error correcting code.	141	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In some embodiments, information about the “DC balance,” “balance,” or “bias” of an ECC chunk, or code word may refer to any information reflecting how similar the code word is to a known “balanced” or “biased” code word with a known or expected ratio of binary zeroes and binary ones, such as an equal number of ones and zeros. Information about the balance may include any information reflecting the relative quantities or frequencies of zero and one bits in the code word. For example, in one embodiment, information about the balance of a code word may include the mean value of bits in the code word, so that a mean value of 0.5 indicates that the code word is balanced with an equal number of binary ones and binary zeroes. In another embodiment, information about the balance of a code word may include a ratio of the number of ones to the number of zeros in the code word, so that a ratio of 1 indicates that the code word is balanced. In certain embodiments, a measurement of the “whiteness” of the code word, or its similarity to random noise, may also provide information about the balance of the code word.	130	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In various embodiments, a balanced code may be any error correcting code where each code word includes a known ratio or range of ratios of binary zero and binary one bits, such as an equal number of binary zeroes and binary ones or the like. In certain embodiments, the secondary/inner error correcting code may be a balanced code from the Reed-Muller family, such as a Walsh-Hadamard or Hadamard code. In some embodiments, a balanced code may generate a code word many times longer than the encoded data. Thus, using a balanced code for the secondary/inner error correcting code may result in encoding a small number of bits very reliably, increasing the likelihood of the secondary ECC module 304 obtaining useful error information by successfully decoding the at least one ECC chunk with the secondary/inner error correcting code.	129	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In one embodiment, the secondary ECC module 304 includes a direct current (DC) balance module 404. In a further embodiment, the secondary, inner error correcting code may include a balanced code, and the DC balance module 404 may determine information about a balance or bias of the at least one ECC chunk encoded with multiple error correcting codes. In a certain embodiment, the error information described above may include the information about the balance or bias of the at least one ECC chunk, from the DC balance module 404 or the like.	128	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In various embodiments, the soft decision module 402 may be implemented in hardware such as the non-volatile memory media controller 126, in software, such as the SML 130 or a program running on processor 111, or as a combination of hardware and software. For example, in one embodiment, the soft decision module 402 may invoke a hardware soft-decision decoder, but may invoke a more computationally-intensive soft-decision decoder in software if the hardware soft-decision decoder is unable to correct the at least one ECC chunk. Using multiple decoders, including a hard-decision decoder and/or multiple soft-decision decoders for the soft decision module 402, allows the secondary ECC module 304 to decode ECC chunks with fewer errors quickly using a simpler decoder and to decode ECC chunks with more errors using a more complex decoder.	127	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In one embodiment, the secondary ECC module 304 may use a hard-decision decoder that uses no soft information, in connection with the soft-decision decoder used by the soft decision module 402. In some embodiments, the soft-decision decoder may be able to correct more errors in an ECC chunk than the hard-decision decoder, but the soft-decision decoder may use more time and/or computational resources than the hard-decision decoder. In further embodiments, the secondary ECC module 304 may use the hard-decision decoder to attempt to decode the at least one ECC chunk, and may activate the soft decision module 402 in response to determining that the at least one ECC chunk is uncorrectable using the hard-decision decoder with the secondary/inner error correcting code.	126	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In one embodiment, the soft decision module 402 may use soft information derived from repetitions of a message in a repetition error correcting code. For example, the soft information may include the analog information discussed above with regard to the analog information module 408. In another embodiment, the soft decision module 402 may use soft information derived from repeatedly reading the non-volatile memory media 122 using different read thresholds. For example, reading a MLC Flash memory cell multiple times using different read voltage thresholds may generate soft information about the voltage level of the cell. In light of this disclosure, many types of soft information are clear that the soft decision module 402 may use with a soft-decision decoder.	125	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In various embodiments, a soft-decision decoder may be useful for decoding various types of secondary/inner error correcting code, such as an LDPC code, BCH code, turbo code, or the like. In one embodiment, the soft decision module 402 may use an iterated soft-decision decoder. In another embodiment, the soft decision module 402 may use a non-iterated soft-decision decoder.	124	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In one embodiment, the decoder for the secondary, inner error correcting code may include a soft-decision decoder. For example, in a certain embodiment, the secondary ECC module 304 includes a soft decision module 402. The soft decision module 402, in a further embodiment, is configured to decode the at least one ECC chunk encoded with multiple error correcting codes using a soft-decision decoder with the secondary, inner error correcting code. In some embodiments, a soft-decision decoder may decode a code word for the secondary/inner error correcting code using “soft information” that includes more than one bit of information for each bit of the code word. For example, in one embodiment, the soft decision module 402 may use an analog or multiple-bit value as soft information to indicate a reliability for each bit of the code word. By using soft information, the soft decision module 402 may, in some embodiments, be able to decode an ECC chunk that would be otherwise uncorrectable using the secondary/inner error correcting code.	123	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In the depicted embodiment, two ECC chunks 502 include access data chunks 504, while the remaining ECC chunks 502 for the region 500 include user data chunks 506. In another embodiment, one, three, or more ECC chunks 502 may include access data chunks 504, with the remaining ECC chunks 502 for the region 500 including user data chunks 506.	150	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	The secondary ECC module 304 determines 714 whether the ECC chunk is correctable using a second error correcting code different from the first error correcting code. If the ECC chunk is correctable using the second error correcting code, the adjustment module 306 adjusts 716 one or more media parameters for accessing the non-volatile media 122 based on error information from the second error correcting code, and the method 700 enters a new iteration; the control loop module 410 reads 702 the ECC chunk using the adjusted media parameters. If the ECC chunk is not correctable using the second error correcting code, then the method 700 ends. In one embodiment, if the method 700 ends because the ECC chunk is not correctable using the second error correcting code, then data encoded in additional ECC chunks with a weaker error correcting code may be lost. In another embodiment, however, data may still be retrieved in other ways, such as by using a higher-performance ECC decoder on a host such as computing device 110, or by copying the data from a backup.	158	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	FIG. 7 is a schematic flow chart diagram illustrating another embodiment of a method 700 for managing non-volatile media. The method 700 begins, and the control loop module 410 reads 702 an ECC chunk. The primary ECC module 302 determines 704 whether the ECC chunk is correctable using a first error correcting code. If the ECC chunk is correctable using the first error correcting code, then the non-volatile memory device 120 reads and returns 706 data from additional ECC chunks, and the method 700 ends. If the at least chunk is not correctable using the first error correcting code, then the repetition code module 406 determines 708 whether the ECC chunk is correctable using a repetition error correcting code. If the ECC chunk is correctable using a repetition error correcting code, the adjustment module 306 adjusts 710 one or more media parameters for accessing the non-volatile media 122 based on error information from the repetition error correcting code, and the method 700 enters a new iteration; the control loop module 410 reads 702 the ECC chunk using the adjusted media parameters. If the ECC chunk is not correctable using the repetition error correcting code, the analog information module 408 derives 712 analog information from repeated messages of the repetition error correcting code.	157	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	FIG. 6 depicts one embodiment of a method 600 for managing non-volatile media. The method 600 begins, and the primary ECC module 302 determines 602 whether at least one ECC chunk is correctable using a first error correcting code. If the at least one ECC chunk is correctable using the first error correcting code, the adjustment module 306 adjusts 604 one or more media parameters for accessing the non-volatile media 122 based on error information from the first error correcting code, and the method 600 ends. Alternatively, if the at least one ECC chunk is not correctable using the first error correcting code, the secondary ECC module 304 determines 606 whether the at least one ECC chunk is correctable using a second error correcting code different from the first error correcting code. If the at least one ECC chunk is correctable using the second error correcting code, the adjustment module 306 adjusts 608 one or more media parameters for accessing the non-volatile media 122 based on error information from the second error correcting code, and the method 600 ends. If the at least one ECC chunk is not correctable using the second error correcting code, the method 600 ends. In one embodiment, if the method 600 ends without adjusting 604, 608 media parameters, data encoded in additional ECC chunks with a weaker error correcting code may be lost. In another embodiment, however, data may still be retrieved in other ways, such as by using a higher-performance ECC decoder on a host such as computing device 110, or by copying the data from a backup.	156	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In the depicted embodiment, the access data chunk 504 includes access data 540 encoded with the secondary/inner error correcting code but without the repetition error correcting code of FIG. 5B. In one embodiment, the secondary/inner error correcting code may be a balanced code, so the access data chunk 504 includes an equal number of zero and one bit data values once encoded. In the depicted embodiment, the secondary/inner error correcting code is a systematic balanced code, so that the access data chunk 504 includes a small amount of access data 540 and a larger amount of check bits 542, providing stronger error correction and a lower code rate than the primary/outer error correcting code described with regard to FIG. 5A. The large number of check bits 542 may provide an equal number of zero and one bits for the access data chunk 504, and may also provide strong error correction. In another embodiment, the secondary/inner error correcting code may be a non-systematic balanced code. As in the depicted embodiment, a non-systematic balanced code may encode a small amount of access data 540 in a significantly larger code word 504 to provide strong error correction with a balanced code word 504. However, a non-systematic code may not embed access data 540 and check bits 542 separately in the code word 504 as shown.	155	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	FIG. 5C depicts another embodiment of an access data chunk 504. The access data chunk 504, in certain embodiments, may be substantially similar to the access data chunk 504 described above with regard to FIG. 5A. In the depicted embodiment, the access data chunk 504 is a code word for the secondary/inner error correcting code, including access data 540 and check bits 542.	154	Added by DJM 2 2021	2/22/21, 12:00 AM

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