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US-20150012794-A1 FIG. 3 is a schematic block diagram illustrating one embodiment of a configuration module; 14 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 FIG. 2 is a schematic block diagram illustrating a further embodiment of a non-volatile memory system comprising a configuration module; 13 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 Many of the functional units described in this specification have been labeled as modules, in order to more particularly emphasize their implementation independence. For example, a module may be implemented as a hardware circuit comprising custom VLSI circuits or gate arrays, off-the-shelf semiconductors such as logic chips, transistors, or other discrete components. A module may also be implemented in programmable hardware devices such as field programmable gate arrays, programmable array logic, programmable logic devices or the like. 23 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 FIG. 1A is a schematic block diagram illustrating one embodiment of a non-volatile memory system comprising a configuration module; 11 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 In order that the advantages of the disclosure will be readily understood, a more particular description of the disclosure briefly described above will be rendered by reference to specific embodiments that are illustrated in the appended drawings. Understanding that these drawings depict only typical embodiments of the disclosure and are not therefore to be considered to be limiting of its scope, the disclosure will be described and explained with additional specificity and detail through the use of the accompanying drawings, in which: 10 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 A computer program product is presented to perform operations for managing non-volatile media. In certain embodiments, the computer program product includes a computer readable storage medium storing computer usable program code executable to perform the operations of the computer program product. In one embodiment, the operations include determining outer error information using a primary error correcting code to attempt to decode an error correcting code (ECC) block of a non-volatile memory device. In a certain embodiment, the operations include determining inner error information using a secondary error correcting code to attempt to decode the ECC block. In a further embodiment, the secondary error correcting code is different from the primary error correcting code. In some embodiments, the operations include adjusting one or more media parameters for accessing a non-volatile medium of the non-volatile memory device based on error information. In further embodiments, the error information includes the outer error information and the inner error information. 9 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 A system is presented for managing non-volatile media. In one embodiment, a non-volatile recording device is in communication with a host device over a communications bus. In a certain embodiment, a primary ECC module is configured to determine first error information using a first error correcting code to attempt to decode at least one error correcting code (ECC) code word of a non-volatile recording device. In a further embodiment, a secondary ECC module is configured to determine second error information using a second error correcting code to attempt to decode the at least one ECC code word. In certain embodiments, the second error correcting code is different from the first error correcting code. In some embodiments, an adjustment module is configured to adjust one or more media parameters for accessing a non-volatile medium of the non-volatile recording device based on error information. In further embodiments, the error information includes the first error information and/or the second error information. 8 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 In one embodiment, an apparatus includes means for determining whether an error correcting code (ECC) chunk is correctable using a repetition error correcting code. An apparatus, in another embodiment, includes means for deriving analog information from repeated messages of a repetition error correcting code in response to determining that an ECC chunk is uncorrectable using the repetition error correcting code. In a further embodiment, an apparatus includes means for determining whether an ECC chunk is correctable using a second error correcting code. Analog information, in certain embodiments, is used to inform a decoder for a second error correcting code. 7 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 Apparatuses are presented for managing non-volatile media. In one embodiment, a secondary ECC module is configured to decode at least one error correcting code (ECC) block of a non-volatile memory device using a secondary error correcting code. In some embodiments, an adjustment module is configured to determine one or more media parameters based on decoding at least one ECC block. One or more media parameters, in one embodiment, are for reading one or more additional ECC blocks from a non-volatile memory device. A primary ECC module, in certain embodiments, is configured to decode one or more additional ECC blocks of a non-volatile memory device using a primary error correcting code, and the one or more additional ECC blocks are read using one or more media parameters. 6 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 Methods are presented for managing non-volatile media. In one embodiment, a method includes determining whether a first error correcting code (ECC) code word of a non-volatile storage device is correctable using a first error correcting code. In a further embodiment, a method includes determining whether a second ECC code word is correctable using a second error correcting code. In a certain embodiment, determining whether the second ECC code word is correctable using the second error correcting code is in response to determining that the first ECC code word is uncorrectable using the first error correcting code. In some embodiments, a method includes adjusting one or more media parameters for accessing a non-volatile medium of the non-volatile storage device based on error information. In certain embodiments, the error information includes information from a decoder for the second error correcting code. In further embodiments, adjusting the one or more media parameters is in response to determining that the second ECC code word is correctable using the second error correcting code. 5 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 Error rates may increase, though, as storage density increases, because shrinking feature sizes for storage cells make the cells more susceptible to disturbances, and because increasing the number of states per cell increases the likelihood that a disturbance will change the state of a cell. Stronger error correcting codes may compensate for increased error rates, but may also may also increase the computational and storage overhead associated with encoding, storing, and decoding data. 4 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 An error may occur if the stored value for a cell drifts past a threshold parameter from one state into an adjacent state due to cell damage, cell leakage, temperature effects, or other disturbances. Leakage and other disturbances may increase with age as storage cells are used over time. So, over time, different parameters may become more optimal for the storage cells, in order to avoid errors. Error correcting codes may also compensate for some errors in data. 3 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 The schematic flowchart diagrams and/or schematic block diagrams in the Figures illustrate the architecture, functionality, and operation of possible implementations of apparatuses, systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the schematic flowchart diagrams and/or schematic block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). 33 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 The non-volatile memory controller may be configured to store data in a contextual format. As used herein, a contextual format refers to a self-describing data format in which persistent contextual metadata is stored with the data on the physical storage media. The persistent contextual metadata provides context for the data it is stored with. In certain embodiments, the persistent contextual metadata uniquely identifies the data that the persistent contextual metadata is stored with. For example, the persistent contextual metadata may uniquely identify a sector of data owned by a storage client from other sectors of data owned by the storage client. In a further embodiment, the persistent contextual metadata identifies an operation that is performed on the data. In a further embodiment, the persistent contextual metadata identifies a sequence of operations performed on the data. In a further embodiment, the persistent contextual metadata identifies security controls, a data type, or other attributes of the data. In a certain embodiment, the persistent contextual metadata identifies at least one of a plurality of aspects, including data type, a unique data identifier, an operation, and a sequence of operations performed on the data. The persistent contextual metadata may include, but is not limited to: a logical address of the data, an identifier of the data (e.g., a file name, object id, label, unique identifier, or the like), reference(s) to other data (e.g., an indicator that the data is associated with other data), a relative position or offset of the data with respect to other data (e.g., file offset, etc.), data size and/or range, and the like. The contextual data format may comprise a packet format comprising a data segment and one or more headers. Alternatively, a contextual data format may associate data with context information in other ways (e.g., in a dedicated index on the non-volatile memory media, a memory division index, or the like). 42 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 The logical address space presented by the storage management layer may have a logical capacity, which may correspond to the number of available logical addresses in the logical address space and the size (or granularity) of the data referenced by the logical addresses. For example, the logical capacity of a logical address space comprising 2̂32 unique logical addresses, each referencing 2048 bytes (2 KiB) of data may be 2̂43 bytes. (As used herein, a kibibyte (KiB) refers to 1024 bytes). In some embodiments, the logical address space may be thinly provisioned. As used herein, a “thinly provisioned” logical address space refers to a logical address space having a logical capacity that exceeds the physical capacity of the underlying non-volatile memory device(s). For example, the storage management layer may present a 64-bit logical address space to the storage clients (e.g., a logical address space referenced by 64-bit logical addresses), which exceeds the physical capacity of the underlying non-volatile memory devices. The large logical address space may allow storage clients to allocate and/or reference contiguous ranges of logical addresses, while reducing the chance of naming conflicts. The storage management layer may leverage the any-to-any mappings between logical addresses and physical storage resources to manage the logical address space independently of the underlying physical storage devices. For example, the storage management layer may add and/or remove physical storage resources seamlessly, as needed, and without changing the logical addresses used by the storage clients. 41 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 As used herein, a logical memory element refers to a set of two or more non-volatile memory elements that are or are capable of being managed in parallel (e.g., via an I/O and/or control bus). A logical memory element may comprise a plurality of logical memory units, such as logical pages, logical memory divisions (e.g., logical erase blocks), and so on. As used herein, a logical memory unit refers to a logical construct combining two or more physical memory units, each physical memory unit on a respective non-volatile memory element in the respective logical memory element (each non-volatile memory element being accessible in parallel). As used herein, a logical memory division refers to a set of two or more physical memory divisions, each physical memory division on a respective non-volatile memory element in the respective logical memory element. 40 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 The SML may maintain metadata, such as a forward index, to map logical addresses of the logical address space to media storage locations on the non-volatile memory device(s). The SML may provide for arbitrary, any-to-any mappings from logical addresses to physical storage resources. As used herein, an “any-to any” mapping may map any logical address to any physical storage resource. Accordingly, there may be no pre-defined and/or pre-set mappings between logical addresses and particular, media storage locations and/or media addresses. As used herein, a media address refers to an address of a memory resource that uniquely identifies one memory resource from another to a controller that manages a plurality of memory resources. By way of example, a media address includes, but is not limited to: the address of a media storage location, a physical memory unit, a collection of physical memory units (e.g., a logical memory unit), a portion of a memory unit (e.g., a logical memory unit address and offset, range, and/or extent), or the like. Accordingly, the SML may map logical addresses to physical data resources of any size and/or granularity, which may or may not correspond to the underlying data partitioning scheme of the non-volatile memory device(s). For example, in some embodiments, the non-volatile memory controller is configured to store data within logical memory units that are formed by logically combining a plurality of physical memory units, which may allow the non-volatile memory controller to support many different virtual memory unit sizes and/or granularities. 39 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 The non-volatile memory controller may comprise a storage management layer (SML), which may present a logical address space to one or more storage clients. One example of an SML is the Virtual Storage Layer® of Fusion-io, Inc. of Salt Lake City, Utah. Alternatively, each non-volatile memory device may comprise a non-volatile memory media controller, which may present a logical address space to the storage clients. As used herein, a logical address space refers to a logical representation of memory resources. The logical address space may comprise a plurality (e.g., range) of logical addresses. As used herein, a logical address refers to any identifier for referencing a memory resource (e.g., data), including, but not limited to: a logical block address (LBA), cylinder/head/sector (CHS) address, a file name, an object identifier, an inode, a Universally Unique Identifier (UUID), a Globally Unique Identifier (GUID), a hash code, a signature, an index entry, a range, an extent, or the like. 38 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 According to various embodiments, a non-volatile memory controller manages one or more non-volatile memory devices. The non-volatile memory device(s) may comprise memory or storage devices, such as solid-state storage device(s), that are arranged and/or partitioned into a plurality of addressable media storage locations. As used herein, a media storage location refers to any physical unit of memory (e.g., any quantity of physical storage media on a non-volatile memory device). Memory units may include, but are not limited to: pages, memory divisions, erase blocks, sectors, blocks, collections or sets of physical storage locations (e.g., logical pages, logical erase blocks, described below), or the like. 37 Added by DJM 2 2021 2/22/21, 12:00 AM
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US-20150012794-A1 The description of elements in each figure may refer to elements of proceeding figures. Like numbers refer to like elements in all figures, including alternate embodiments of like elements. 36 Added by DJM 2 2021 2/22/21, 12:00 AM

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