New Term
Terms List
| Id | Matter | Term | Definition | Doc No | Modified | Actions |
|---|---|---|---|---|---|---|
| 1900 | FLO-7PROV | sidewall |
"Sidewall" refers to a wall forming a side of a structure, object, component, or system. (Search "sidewall" on wordhippo.com. WordHippo, 2022. Web. Accessed 21 Sept. 2022)
"Sidewall" refers to a wall forming a side of a structure, object, component, or system. (Search "sidewall" on wordhippo.com. WordHippo, 2022. Web. Accessed 21 Sept. 2022)
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FLO-7PROV | 9/21/22, 5:46 PM | Add Term Edit Delete |
| 1899 | FLO-7PROV | profile |
"Profile" refers to the outermost shape, view, or edge of an object. (Search "profile" on wordhippo.com. WordHippo, 2022. Web. Accessed 21 Sept. 2022)
"Profile" refers to the outermost shape, view, or edge of an object. (Search "profile" on wordhippo.com. WordHippo, 2022. Web. Accessed 21 Sept. 2022)
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FLO-7PROV | 9/21/22, 5:44 PM | Add Term Edit Delete |
| 1898 | FLO-7PROV | mesh surface |
"Mesh surface" refers to a surface formed by a mesh or lattice structure.
"Mesh surface" refers to a surface formed by a mesh or lattice structure.
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FLO-7PROV | 9/21/22, 5:26 PM | Add Term Edit Delete |
| 1897 | FLO-7PROV | frame member |
"Frame member" refers to a component, subcomponent, or part of a frame.
"Frame member" refers to a component, subcomponent, or part of a frame.
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FLO-7PROV | 9/21/22, 5:19 PM | Add Term Edit Delete |
| 1808 | NXT-5PROV NXT-5, 6, 7, 8 | cross-sectional configuration |
"Cross-sectional configuration" refers to a configuration of a cross-section of a device, apparatus, structure, or object. A cross-sectional configuration may include openings, passages, voids, struts, braces, ridges, rails, and/or edges organized to implement a particular cross-sectional configuration.
"Cross-sectional configuration" refers to a configuration of a cross-section of a device, apparatus, structure, or object. A cross-sectional configuration may include openings, passages, voids, struts, braces, ridges, rails, and/or edges organized to implement a particular cross-sectional configuration.
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NXT-5 | 9/21/22, 5:18 PM | Add Term Edit Delete |
| 1896 | FLO-7PROV | gyroid triply periodic minimal surface |
A “gyroid triply periodic minimal surface” refers to a type of TPMS surface. A gyroid is a type of infinitely connected surface that Alan Schoen discovered in 1970. A gyroid surface is a type of triply periodic minimal surface (TPMS) that can be generated using a mesh generating software tool or feature of a CAD/CAM/CAE tool. Advantageously, a gyroid surface has a high surface area. A gyroid triply periodic minimal surface may originate from a triply periodic minimal surface (TPMS) field.
A “gyroid triply periodic minimal surface” refers to a type of TPMS surface. A gyroid is a type of infinitely connected surface that Alan Schoen discovered in 1970. A gyroid surface is a type of triply periodic minimal surface (TPMS) that can be generated using a mesh generating software tool or feature of a CAD/CAM/CAE tool. Advantageously, a gyroid surface has a high surface area. A gyroid triply periodic minimal surface may originate from a triply periodic minimal surface (TPMS) field.
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FLO-7PROV | 9/21/22, 5:13 PM | Add Term Edit Delete |
| 1895 | PER-33 | trajectory angle |
"Trajectory angle" refers to a recommended angle for deployment of an instrument, graft, or body part for a procedure.
"Trajectory angle" refers to a recommended angle for deployment of an instrument, graft, or body part for a procedure.
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9/15/22, 11:32 PM | Add Term Edit Delete | |
| 1894 | PER-33 | recommended location |
"Recommended location" refers to a location for deployment of a tendon or other soft tissue on, in, or within a body part of a patient.
"Recommended location" refers to a location for deployment of a tendon or other soft tissue on, in, or within a body part of a patient.
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9/15/22, 11:30 PM | Add Term Edit Delete | |
| 1893 | PER-33 | tendon trajectory guide |
"Tendon trajectory guide" refers to any structure, apparatus, surface, device, system, feature, or aspect configured to indicate, identify, guide, place, position, or otherwise assist in marking or deploying a fastener or other structure along a desired trajectory for one or more subsequent steps in a procedure.
"Tendon trajectory guide" refers to any structure, apparatus, surface, device, system, feature, or aspect configured to indicate, identify, guide, place, position, or otherwise assist in marking or deploying a fastener or other structure along a desired trajectory for one or more subsequent steps in a procedure.
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9/15/22, 10:51 PM | Add Term Edit Delete | |
| 1892 | PON-1PROV, 2PROV, 3PROV | pulse wave |
"Pulse wave" or "pulse train" refers to a type of non-sinusoidal waveform that includes square waves and similarly periodic but asymmetrical waves. (Search “pulse wave” on Wikipedia.com July 1, 2022. Modified. Accessed Sept. 2, 2022.)
"Pulse wave" or "pulse train" refers to a type of non-sinusoidal waveform that includes square waves and similarly periodic but asymmetrical waves. (Search “pulse wave” on Wikipedia.com July 1, 2022. Modified. Accessed Sept. 2, 2022.)
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9/2/22, 8:17 PM | Add Term Edit Delete | |
| 1890 | PON-1PROV, 2PROV, 3PROV | open loop |
"Open loop" refers to any system that is controlled, managed, adjusted, and/or configured based on a feedback loop that does not provide a value, setting, threshold, and/or input that is provided into the same system.
"Open loop" refers to any system that is controlled, managed, adjusted, and/or configured based on a feedback loop that does not provide a value, setting, threshold, and/or input that is provided into the same system.
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9/2/22, 7:13 PM | Add Term Edit Delete | |
| 1889 | PON-1PROV, 2PROV, 3PROV | output low level |
"Output low level" refers to a voltage level of an output node of a circuit. In certain embodiments, an output low level refers to a logic low level, also referred to as an off state or logic zero.
"Output low level" refers to a voltage level of an output node of a circuit. In certain embodiments, an output low level refers to a logic low level, also referred to as an off state or logic zero.
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8/29/22, 4:39 PM | Add Term Edit Delete | |
| 1888 | PON-1PROV, 2PROV, 3PROV | output high level |
"Output high level" refers to a voltage level of an output node of a circuit. In certain embodiments, an output high level refers to a logic high level, also referred to as an on state or logic one.
"Output high level" refers to a voltage level of an output node of a circuit. In certain embodiments, an output high level refers to a logic high level, also referred to as an on state or logic one.
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8/29/22, 4:38 PM | Add Term Edit Delete | |
| 1887 | PON-1PROV, 2PROV, 3PROV | totem-pole circuit |
"Totem-pole circuit" refers to any circuit, sub-circuit, component, or the like that includes a pair of transistors coupled to each other and a tristate input component, such that activating the tristate input component in a first state activates a first transistor of the pair of transistors and deactivates a second transistor of the pair of transistors and results in a low voltage output level for the totem-pole circuit, activating the tristate input component in a second state deactivates the first transistor and activates the second transistor and results in a high voltage output level for the totem-pole circuit, and activating the tristate input component in a third state neither activates or deactivates the first transistor or the second transistor and results in a floating output ("high impedance") level for the totem-pole circuit. In one example, a totem-pole circuit may be a high voltage tristate output circuit.
"Totem-pole circuit" refers to any circuit, sub-circuit, component, or the like that includes a pair of transistors coupled to each other and a tristate input component, such that activating the tristate input component in a first state activates a first transistor of the pair of transistors and deactivates a second transistor of the pair of transistors and results in a low voltage output level for the totem-pole circuit, activating the tristate input component in a second state deactivates the first transistor and activates the second transistor and results in a high voltage output level for the totem-pole circuit, and activating the tristate input component in a third state neither activates or deactivates the first transistor or the second transistor and results in a floating output ("high impedance") level for the totem-pole circuit. In one example, a totem-pole circuit may be a high voltage tristate output circuit.
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8/29/22, 4:36 PM | Add Term Edit Delete | |
| 1886 | PON-1PROV, 2PROV, 3PROV | boost circuit |
"Boost circuit" refers to any circuit, sub-circuit, component, or the like that converts an input voltage or starting voltage into a higher output voltage. In one example, a boost circuit may convert a low voltage such as about 5.5 volts to a high voltage such as 10 volts or more.
"Boost circuit" refers to any circuit, sub-circuit, component, or the like that converts an input voltage or starting voltage into a higher output voltage. In one example, a boost circuit may convert a low voltage such as about 5.5 volts to a high voltage such as 10 volts or more.
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8/29/22, 3:52 PM | Add Term Edit Delete | |
| 1885 | PON-1PROV, 2PROV, 3PROV | charge collector |
"Charge collector" refers to any device that collects or can collect charge, including a battery, a capacitor, an inductor, or the like.
"Charge collector" refers to any device that collects or can collect charge, including a battery, a capacitor, an inductor, or the like.
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8/29/22, 3:50 PM | Add Term Edit Delete | |
| 1880 | PON-1PROV, 2PROV, 3PROV | QFN package |
"QFN package" refers to a type of flat no-leads semiconductor packaging that encloses a die, semiconductor, or circuit, and exposes leads of the circuit for electrical connection to other components of an electronic circuit and/or a printed circuit board (PCB). A QFN package is a package that include planar leads that are exposed on four sides of one surface of the package. Flat no-leads semiconductor packaging is a near chip scale plastic encapsulated package made with a planar copper lead frame substrate. Flat no-leads semiconductor packaging include leads that remain within the perimeter of the sides of the package that include the leads. Because the leads do not extend beyond the perimeter of the sides of the package the packaging may be referred to as a no lead package. Perimeter lands on the package bottom provide electrical connections to the PCB. (Search “flat no-leads package” on Wikipedia.com March 26, 2022. Modified. Accessed Aug. 24, 2022.)
"QFN package" refers to a type of flat no-leads semiconductor packaging that encloses a die, semiconductor, or circuit, and exposes leads of the circuit for electrical connection to other components of an electronic circuit and/or a printed circuit board (PCB). A QFN package is a package that include planar leads that are exposed on four sides of one surface of the package. Flat no-leads semiconductor packaging is a near chip scale plastic encapsulated package made with a planar copper lead frame substrate. Flat no-leads semiconductor packaging include leads that remain within the perimeter of the sides of the package that include the leads. Because the leads do not extend beyond the perimeter of the sides of the package the packaging may be referred to as a no lead package. Perimeter lands on the package bottom provide electrical connections to the PCB. (Search “flat no-leads package” on Wikipedia.com March 26, 2022. Modified. Accessed Aug. 24, 2022.)
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8/25/22, 9:16 PM | Add Term Edit Delete | |
| 1884 | PON-1PROV, 2PROV, 3PROV | computing device |
"Computing device" refers to any electronic device capable of computing by performing arithmetic or logical operations on electronic data and/or signals. For example, a computing device may be a server, a workstation, a desktop computer, a laptop computer, a tablet, a handheld device, a smartphone, a control system for another electronic device, a network attached storage device, a block device on a storage area network, a router, a network switch, or the like. In certain embodiments, a computing device may include a non-transitory, computer readable storage medium that stores computer readable instructions configured to cause the computing device to perform steps of one or more of the functions, operations, and/or methods disclosed herein. The computing device may include a processor, a memory, and storage. In various embodiments, the processor may refer to any electronic element that carries out the arithmetic or logical operations. For example, in one embodiment, the processor may be a general-purpose processor that executes stored instructions or program code. In another embodiment, a processor may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), or the like, that operates on data stored by a memory and/or storage.
"Computing device" refers to any electronic device capable of computing by performing arithmetic or logical operations on electronic data and/or signals. For example, a computing device may be a server, a workstation, a desktop computer, a laptop computer, a tablet, a handheld device, a smartphone, a control system for another electronic device, a network attached storage device, a block device on a storage area network, a router, a network switch, or the like. In certain embodiments, a computing device may include a non-transitory, computer readable storage medium that stores computer readable instructions configured to cause the computing device to perform steps of one or more of the functions, operations, and/or methods disclosed herein. The computing device may include a processor, a memory, and storage. In various embodiments, the processor may refer to any electronic element that carries out the arithmetic or logical operations. For example, in one embodiment, the processor may be a general-purpose processor that executes stored instructions or program code. In another embodiment, a processor may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), an application-specific integrated circuit (ASIC), or the like, that operates on data stored by a memory and/or storage.
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8/25/22, 8:21 PM | Add Term Edit Delete | |
| 1883 | PON-1PROV, 2PROV, 3PROV | implantable pulse generator (IPG) |
"Implantable pulse generator" (IPG) refers to any apparatus, device, component, assembly, system, or the like configured, designed, engineered, or built to generate a pulse for stimulating a part of a patient.
"Implantable pulse generator" (IPG) refers to any apparatus, device, component, assembly, system, or the like configured, designed, engineered, or built to generate a pulse for stimulating a part of a patient.
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8/25/22, 4:04 PM | Add Term Edit Delete | |
| 1874 | PON-1PROV, 2PROV, 3PROV | signal |
"Signal" refers to any time-varying voltage, current, or electromagnetic wave that carries information, energy, or data. (Search “signal” on Wikipedia.com Aug. 5, 2022. Modified. Accessed Aug. 23, 2022.)
"Signal" refers to any time-varying voltage, current, or electromagnetic wave that carries information, energy, or data. (Search “signal” on Wikipedia.com Aug. 5, 2022. Modified. Accessed Aug. 23, 2022.)
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8/24/22, 11:29 PM | Add Term Edit Delete |