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Delete 		US-8380915-A1 In one embodiment, the configuration module 352 adjusts one or more read voltage thresholds 662 based on a subset of binary data that multi-level storage cells store, such as just an upper page, just a lower page, or the like. In such embodiments, examining the state changes for the LSB bit(s) indicate the direction the voltage in the multi-level storage cell is changing. For both Gray code encoding (as depicted in FIG. 6C) and binary code encoding of bit values, the LSB of a multi-level storage cell transitions between a binary zero and a binary one between the middle two abodes or states, the L1 state and the L2 state in the depicted embodiment. For other encoding models, the MSB may transition between a binary zero and a binary one between the middle two abodes or states, or the like. For Gray code or binary code encoding models, the LSB has a value of “1” for read voltages in a lower range (including the lower two states or abodes, L0 and L1) and the LSB has a value of “0” for read voltages in an upper range (including the upper two states or abodes, L2 and L3). By using just the LSB of MLC storage cells to determine whether a read bias deviates from a known bias, the configuration module 352, in one embodiment, may make the determination in a substantially similar manner to determining whether a read bias for SLC storage cells deviates from a known bias, by counting or tallying binary ones and/or binary zeroes of an LSB data set, or the like. 286 Added by DJM 3 2021 3/12/21, 12:00 AM
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Delete 		US-8380915-A1 In certain embodiments, the solid-state storage media 110 may employ a two-phase programming model. In such a model, a binary value is first written to the LSB by way of a first write command to the lower page. The write command causes the multi-level storage cell to move from its initial state (for example, a 11 state in L0) to an intermediate state (the lower-to-middle LM state—between L1 and L2) configured such that a 00 state is subsequently read. For example, writing a “0” to the lower page causes the multi-level storage cell to change from the L0 state (where both the LSB and the MSB are 1) to the L2 state (where the LSB is changed to a 0). A subsequent write of a “0” to the upper page moves the multi-level storage cell from the intermediate state (typically between the L1 state and the L2 state) to L2 state such that both bits of the MLC are “0”. Thus, in such an embodiment, two writes (one to the lower page and one to the upper page) are needed to move the multi-level cell from L0 to L2, since the cell transitions through the intermediate state and the MLC device requires that the lower page be programmed before the upper page and does not allow partial programming of a page without an intervening erase operation. Writing a “1” to either of the upper page or lower page will cause the MLC to transition to either L1 or L3 depending on the binary value of the lower page at the time. In addition, certain solid-state media vendors may impose a requirement that the lower page must be written to before the upper page, or the like. In other embodiments, the solid-state storage media 110 may employ a two-phase programming model where a binary value is first written to the MSB by way of a first write command to the upper page. 285 Added by DJM 3 2021 3/12/21, 12:00 AM
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Delete 		US-8380915-A1 In one embodiment, the LSB corresponds to a lower page of data and the MSB corresponds to an upper page of data. In certain embodiments, the multi-level storage cell may adhere to a two-phase programming model, described below, which requires that the LSB be written to before the MSB can be written or vice versa. In another embodiment, the LSB and MSB may be programmed separately by the solid-state storage controller 104. Such an approach may be taken due to vendor or manufacturer requirements for page pairing (i.e., a LSB bit of MLC cell is paired with an MSB bit of a different MLC cell) and page addressing (i.e., LSB page must be programmed before the MSB page or vice versa). In certain instances, the LSB must be written before the MSB is written, the MSB must be written before the LSB is written, or the like. 284 Added by DJM 3 2021 3/12/21, 12:00 AM
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Delete 		US-8380915-A1 The configuration parameter module 504, in certain embodiments, bases a configuration parameter for a set of storage cells on a target set of storage cells to bootstrap the configuration parameter in response to a lack of known storage media characteristics for the set of storage cells. The configuration parameter module 504 may bootstrap a configuration parameter for a set of storage cells during a startup operation or another operation where storage media characteristics for the set of storage cells may not yet be available, but storage media characteristics or other data may be available for a target set of storage cells. For example, metadata stored in a metadata region of the solid-state storage media 110 may have a known or controlled program/erase count and the configuration parameter module 504 may base a configuration parameter for a region of the solid-state storage media 110 storing user data on the known or controlled program/erase count for the metadata region. 255 Added by DJM 3 2021 3/12/21, 12:00 AM
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Delete 		US-8380915-A1 FIG. 6C shows one embodiment of configuration parameters 662a-c for a set of multi-level storage cells, such as MLC NAND flash storage cells, or the like, with an example encoding or programming model. Any limitations inherent in the represented encoding model do not necessarily apply to all other encoding models, and the present invention should not be construed as inherently containing any such limitations. The read voltage states, in the depicted embodiment, are encoded using a Gray code encoding model, with binary values for adjacent states differing by a single bit in the encoding. 282 Added by DJM 3 2021 3/12/21, 12:00 AM
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Delete 		US-8380915-A1 FIG. 6B is a schematic block diagram illustrating one embodiment of an array 650 of N storage elements 606 in accordance with the present invention. The array 650, in the depicted embodiment, is substantially similar to the array 600 of FIG. 6A, but with the ECC chunk 652 including data 612a in a single storage element 606a, instead of across several storage elements 606a-n. In one embodiment, ECC checkbits for the ECC chunk 652 are stored in the single storage element 606a. Because each storage element 606a-n or channel 604a-n has separate ECC checkbits, in one embodiment, the ECC module 412 uses the separate ECC checkbits to determine in which storage elements 606a-n or channels 604a-n an error has occurred, and the configuration module 352 adjusts the read voltage thresholds of the particular storage element(s) 606 determined by the ECC module 412. 281 Added by DJM 3 2021 3/12/21, 12:00 AM
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Delete 		US-8380915-A1 Consequently, the number of combinations that may need to be attempted changes from 17,644 where x=2 to 32 and from 1,036,288 where x=3 to 256, because the configuration module 352 uses the known bias to determine which channels have read voltage thresholds that need adjusting and the direction of the adjustment. However, each of these combinations may not need to be tried because as the adjustments are iteratively made, the known bias of the data continues to indicate which direction to make each subsequent adjustment, potentially cutting the search space at least in half with each iteration. Various search algorithms can be used to quickly identify a suitable adjusted read voltage threshold. (i.e. a binary search). 280 Added by DJM 3 2021 3/12/21, 12:00 AM
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Delete 		US-8380915-A1 Using equation 1, for example, if there are twenty-four channels 606a-n (η=24), eight possible read voltage threshold settings for each channel 606 (λ=8), and only two of the twenty-four channels 606a-n have read voltage thresholds that need to be adjusted (x=2), there are 17,644 total different combinations of read voltage threshold settings. If the number of channels 606 with read voltage thresholds that need adjusting increases to three, the number of different combinations increases to 1,036,288. The configuration module 352 drastically reduces these numbers by detecting which channels 606a-n have read voltage thresholds that need adjusting. In addition, comparing the known bias of the data on the media in a storage grouping to the current bias indicates the direction to adjust the read voltage thresholds. Knowing the direction in which to adjust the read voltage threshold greatly reduces the search space for a suitable voltage in the channels known to have a data error. 279 Added by DJM 3 2021 3/12/21, 12:00 AM
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Delete 		US-8380915-A1 The number of different combinations of read voltage threshold settings for the array 600 with all permutations of up to η channels 604a-n, in one embodiment is given by equation 2:g(x,η,λ)=Σi=1x(i,η,λ) (2) 278 Added by DJM 3 2021 3/12/21, 12:00 AM
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Delete 		US-8380915-A1 To illustrate the potential size of the search space for a suitable adjusted read voltage threshold, suppose an ECC chunk 616 (i.e. ECC code word—comprising both data and the corresponding ECC checkbits) is stored on the storage elements 606a-606n. Further suppose that the storage elements 606a-606n in a row of the array 600 that stores the ECC chunk 616 each have an independent adjustable read voltage threshold. For example, in one embodiment, the number of different combinations of read voltage threshold settings for the array 600 with η channels 604a-n, λ number of levels at which the read voltage threshold can be set per channel, and x number of channels that have a read voltage threshold that needs to be adjusted is given by equation 1:f(x,η,λ)=(xη)·λx (1) 277 Added by DJM 3 2021 3/12/21, 12:00 AM
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Delete 		US-8380915-A1 By comparing read biases of data from each of the channels 604a-n to the known bias, the configuration module 352 can correct data errors that occur due to changes in read voltages for particular channel(s) even without the use of ECC checkbits. Without comparing the read biases of data from the channels 604a-n to the known bias, adjustment of the read voltage thresholds would require a large number of trial-and-error tests adjusting and testing every possible read voltage threshold adjustment for each possible combination of channels 604a-n. By comparing the read biases of data from the channels 604a-n to the known bias, the configuration module 352 can determine exactly which channel 604 to adjust. By determining the direction of deviation for those channels, the configuration module 352 further decreases the search space for the read voltage thresholds for those channels by half. 276 Added by DJM 3 2021 3/12/21, 12:00 AM
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Delete 		US-8380915-A1 In one embodiment, the deviation module 404, the ECC module 412, and/or the distribution module 414 determines that a data set has an error or a read bias that deviates from the known bias, and the data set source module 422 determines from which storage element 606 the data set was read. For example, in one embodiment, the array 600 may have 24 channels 604, and 8 bytes may be read in parallel from 24 storage elements 606 of a single bank 602 during a read operation for a total of 192 bytes per read operation. Based on this information, the data set source module 422, in one embodiment, can determine from which storage element 606 a data set was read based on the position of an 8 byte data set within the 192 bytes. In one embodiment, the 192 bytes comprise the ECC chunk 616. 275 Added by DJM 3 2021 3/12/21, 12:00 AM
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Delete 		US-8380915-A1 The distribution module 414, in one embodiment, may cooperate with or be integrated with the deviation module 404. In one embodiment, the configuration module 352 uses either the ECC module 412 or the distribution module 414 to determine when adjustment of the read voltage threshold should be made or is complete. In a further embodiment, the distribution module 414 compares read biases of data sets from several dies, chips, channels, storage elements, PEBs, or other grouping of storage cells of the solid-state storage media 110 to the distribution of the known bias to determine in which grouping of storage cells an error has occurred, and the configuration module 352 adjusts one or more read voltage thresholds in a grouping of storage cells with an error. 227 Added by DJM 3 2021 3/12/21, 12:00 AM
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Delete 		US-8380915-A1 The proactive configuration module 424, in response to determining a configuration parameter for a set of storage cells, configures the set of storage cells to use the determined configuration parameter. The proactive configuration module 424 may periodically update storage media characteristics for a set of storage cells, update a configuration parameter for the set of storage cells, and reconfigure the set of storage cells to use the updated configuration parameter. The proactive configuration module 424 may configure storage cells with configuration parameters during execution of input/output operations, during a startup operation, in response to a background scan of a set of storage cells indicating a changed storage media characteristic, or the like. 236 Added by DJM 3 2021 3/12/21, 12:00 AM
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Delete 		US-8380915-A1 The proactive configuration module 424 references one or more storage media characteristics for a set of storage cells to determine a configuration parameter for the set of storage cells. A storage media characteristic is a statistic, heuristic, or other descriptor associated with an attribute of the solid-state storage media 110. A storage media characteristic for a set of storage cells may be substantially static or may be dynamic and change over time. A storage media characteristic, in one embodiment, includes or relates to a make, a model, a manufacturer, a product version, or the like for the solid-state storage device 102 and/or for the solid-state storage media 110. In another embodiment, a storage media characteristic describes an attribute or statistic for a set of particular storage cells, such as a program/erase cycle count for the set of storage cells, a read count for the set of storage cells, a retention time since a previous write for the set of storage cells, an error statistic for the set of storage cells, or the like. A storage media characteristic, in a further embodiment, may include or relate to an environmental condition or a use of the solid-state storage device 102 and/or of the solid-state storage media 110, such as a temperature, a use case (e.g. a cache use case, an archival use case, a server use case, an enterprise use case, a consumer use case, etc.), or the like. 235 Added by DJM 3 2021 3/12/21, 12:00 AM
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Delete 		US-8380915-A1 As described above, a configuration parameter is a parameter of a set of storage cells that is modifiable by way of an interface, such as a read threshold, a write or program threshold, an erase threshold, or the like. An interface for modifying a configuration parameter may include a programmable data register, a command interface of a control bus for the solid-state storage media 110, an API of a device driver of the solid-state storage device 102, a control parameter for the solid-state storage controller 104, or the like. 234 Added by DJM 3 2021 3/12/21, 12:00 AM
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Delete 		US-8380915-A1 In one embodiment, the proactive configuration module 424 improves the utility of the solid-state storage media 110 by proactively setting and adjusting configuration parameters for storage cells of the solid-state storage media 110. By determining configuration parameters proactively before an error occurs, the proactive configuration module 424 prevents certain errors from occurring, without the performance penalty of retrying reads or performing other remedial measures for the prevented errors. The proactive configuration module 424, in certain embodiments, optimizes configuration parameters for a use case of the solid-state storage device 102 to optimize storage cells for the use case instead of using default parameters. 233 Added by DJM 3 2021 3/12/21, 12:00 AM
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Delete 		US-8380915-A1 By using the position of the data set in a sequence of data sets and other known information, the data set source module 422, in one embodiment, can determine the grouping of storage cells from which the data set was read without using an identifier or other external information. Identifying the die, chip, channel, PEB, or other grouping of storage cells that exhibit the read bias difference permits prompt remedial actions to be taken such as changing the read voltage threshold, logical swapping of the grouping of storage cells with a reserved grouping, and other forms of remedial action. 232 Added by DJM 3 2021 3/12/21, 12:00 AM
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Delete 		US-8380915-A1 The data set source module 422, in a further embodiment, may count or otherwise track the number of data sets processed as part of a read operation to determine the position of the data set in the sequence of data sets. For example, 8 bytes may be read in sequence from the 24 die starting with a first die, thus if the ECC module 412 and/or the distribution module 414 detects a read bias deviation or a data error during operations on the fifth 8 byte set of data, the data set source module 422 identifies that this 8 byte set of data came from the fifth die of the 24 die. 231 Added by DJM 3 2021 3/12/21, 12:00 AM
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Delete 		US-8380915-A1 For example, in one embodiment the write data pipeline 106 and the read data pipeline 108 may each have a 64 bit (8 byte) data path, the solid-state storage media 110 may comprise a 24 die wide array, and 8 bytes may be read in parallel from each of the 24 dies during a read operation, for a total of 192 bytes per read operation. Based on this information, the data set source module 422, in one embodiment, can determine from which die or other grouping of storage cells, a data set was read based on the position of an 8 byte data set within the 192 bytes. 230 Added by DJM 3 2021 3/12/21, 12:00 AM

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