Dave's PCF WIP: Paragraphs

Paragraphs

Actions	Matter	Content	Para #	Notes	Modified
View Edit Delete	US-20150012794-A1	In various embodiments, the depicted region 500 of the non-volatile memory media 122 may include a physical or logical page, physical or logical erase block, chip, die, plurality of chips or dies, or the like. In one embodiment, each ECC chunk 502 comprises a code word from the primary, or outer error correcting code of the primary ECC module 302. In the depicted embodiment, the primary/outer error correcting code is a systematic code, so each ECC chunk 502 includes ECC check bits 508 plus a payload or other information received by an encoder for the primary/outer error correcting code, such as an access data chunk 504 or user data chunk 506. In the depicted embodiment, the first two ECC chunks 502 of the storage region 500 comprise encoded access data chunks 504, while the remaining ECC chunks 502 of the storage region 500 comprise encoded user data chunks 506, with user data, workload data, or the like from storage clients 116.	145	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In another embodiment, the adjustment module 306 uses a search algorithm to determine the read voltage threshold or other media parameter based on the direction of deviation. For example, the range of voltages in the direction of deviation from the current read voltage threshold may be the search space for the search algorithm. The adjustment module 306, in one embodiment, may use a linear search, a binary search, or the like to determine the read voltage threshold. To check each step as part of the search algorithm, the read pipeline 241 may re-read the data set in response to each adjustment, and the DC balance module 404 may re-determine whether the read balance/bias of the re-read data set deviates from the known balance/bias. The DC balance module 404 may re-determine a direction of deviation for the re-read data set to further the search. The adjustment module 306 may iteratively readjust the read voltage threshold or other media parameter, as described with regard to the control loop module 410, based on the re-determined direction of deviation until the DC balance module 404 determines that the read balance/bias of a re-read data set does not deviate from the known balance/bias, or until each of the read voltage threshold levels have been tested, and/or until the data set can be corrected using the primary error correcting code, or the like.	143	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	FIG. 5A depicts a region 500 of the non-volatile memory media 122 including ECC chunks 502. In the depicted embodiment, each ECC chunk 502 includes an access data chunk 504 or a user data chunk 506, as well as ECC check bits 508.	144	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	The DC balance module 404, in one embodiment, may determine the direction by subtracting a ratio, proportion, or other representation of the known or expected balance/bias from a representation of the read balance/bias of the data set. For example, in one embodiment, the DC balance module 404 may subtract the proportion of binary ones, zeroes, multi-bit binary symbols, or the like that are expected based on the known balance/bias from the proportion of binary ones, zeroes, multi-bit binary symbols, or the like that are in the read data set. Depending on whether ratios of binary ones are compared or ratios of binary zeroes are compared and whether a high voltage represents a binary one or a binary zero, or other specific architectures of the storage cells, the DC balance module 404 may invert the difference or perform another transform to determine the direction.	134	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In one embodiment, for NAND flash media 122 or the like, a binary zero may be represented by a voltage below a read voltage threshold and a binary one may be represented by a voltage above the read voltage threshold. In one example, a data set may be stored with a known bias of 0.5, representing that the expected balance/bias of the data set should be one half binary ones, or DC balanced. In this example, the data set may be read from the storage cells and may gave a read balance/bias of 0.7, meaning that seventy percent of the data bits are binary ones. To determine the direction of deviation, in one embodiment, the DC balance module 404 subtracts the expected bias, 0.5, from the read bias of the data set, 0.7, for a direction of 0.2. The direction may be the entire result (e.g., “0.2”), the sign of the result (e.g., “positive”), a relationship (e.g., “greater than”), a direction, (e.g., “up”), or another indicator that represents the difference between the expected bias of 0.5 and the read bias of 0.7.	136	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In another example, if the read balance/bias of a data set is 0.3, meaning that thirty percent of the data bits are binary ones, the DC balance module 404, in one embodiment, may subtract an expected bias of 0.5 or the like from the read bias of the data set, 0.3, for a difference of −0.2. In this example, the direction is the opposite of the first example, “−0.2,” “negative,” “less then,” “down,” or the like.	137	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	Because, in certain embodiments, the expected balance/bias is known, comparing a read balance/bias relative to the known balance/bias indicates that certain bits which should have satisfied the known balance/bias presently do not, which may be due to a data error or due to changes in the voltage level stored in the storage cells after they were written. In addition, determining that the difference is positive or negative indicates whether the read voltage should be increased or decreased such that a re-read of the data set will result in a read balance/bias that is the same as, or comes closer to the known balance/bias. In one embodiment, the adjustment module 306 adjusts the read voltage level (or another media parameter) in the same direction as the direction of deviation indicated by the DC balance module 404.	138	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In certain embodiments, having an indication as to which direction to adjust a read voltage threshold or other media parameter may provide a reduction in time and resources needed to identify a new adjusted read voltage level or other media parameter. If the direction in which to make a read voltage threshold was unknown, identifying a new read voltage threshold may require a labor and time intensive process of trial and error as different possible read voltage thresholds are set and then tested and then adjusted as needed. The process may be used to find a read voltage threshold that results in a re-read of the data packet substantially matching the known balance/bias.	139	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In one embodiment, the adjustment module 306 adjusts a read voltage threshold for the storage cells of the non-volatile memory media 122 based on the direction of deviation that the DC balance module 404 determines. The adjustment module 306, in one embodiment, may adjust the read voltage threshold in the direction of deviation, away from the direction of deviation, or the like. For example, in one embodiment, the adjustment module 306 may raise the read voltage threshold from a previous read voltage threshold in response to the DC balance module 404 detecting more binary ones than expected in the known balance/bias and lower the read voltage threshold in response to fewer binary ones than expected. While the relative directions may change based on characteristics of the storage cells of the non-volatile memory media 122 and the storage scheme employed, the adjustment module 306 adjusts the read voltage threshold to correct or compensate for the difference determined by the DC balance module 404.	140	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	Because, in certain embodiments, the secondary ECC module 304 may provide stronger error correction capabilities for certain ECC code words, the DC balance module 404 may cooperate with the adjustment module 306 to determine, adjust, or set one or more media parameters, such as read voltage thresholds, based on error information for the ECC code words encoded by the secondary ECC module 304, even if other ECC code words encoded just by the primary ECC module 302 are uncorrectable. In this manner, the adjustment module 306 may adjust one or more media parameters until a number of errors in the ECC code words encoded by the primary ECC module 302 is reduced and become correctable by the primary error correcting code.	141	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In certain embodiments, the adjustment module 306 may determine an amount to adjust the read voltage threshold or other media parameter based on an amplitude of the direction or amplitude of the difference determined by the DC balance module 404. In another embodiment, the adjustment module 306 may scale or otherwise adjust the amplitude from the DC balance module 404 and adjust the read voltage threshold the adjusted amount. For example, the adjustment module 306, in one embodiment, may adjust the read voltage threshold by several adjustment levels in a single adjustment, based on the amplitude of the direction. In a further embodiment, the adjustment module 306 may select an amount to adjust the read voltage threshold based on additional factors such as age, amount of wear, usage history, error history, or other aspects of the non-volatile memory media 122.	142	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In one embodiment, the primary ECC module 302 may include, control, or otherwise cooperate with a decoder for the primary error correcting code. In a certain embodiment, the primary ECC module 302 may use the decoder for the primary error correcting code with at least one ECC chunk encoding access data to determine error information, to determine whether the at least one ECC chunk is decodable using the primary error correcting code, or the like. In a further embodiment, the primary ECC module 302 may use the decoder for the primary error correcting code with additional ECC chunks to decode data requested by a user or the like (e.g., the primary ECC module 302 may encode and/or decode all or substantially all data for the non-volatile memory device 120 and the secondary ECC module 304 may encode and/or decode a subset of data, such as access data).	87	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In some embodiments, the secondary ECC module 304 may encode or otherwise provide error correction for access data, using at least a secondary error correcting code. Thus, in further embodiments, the secondary ECC module 304 may determine whether the ECC chunk is correctable using the secondary error correcting code by attempting to decode the access data. In certain embodiments, as described above, the primary ECC module 302 may encode data other than the access data using additional ECC chunks using the primary error correcting code without the secondary error correcting code, and the secondary ECC module 304 may not operate to encode and/or decode the additional ECC chunks. Thus, in some embodiments, the non-volatile memory device 120 may use two error correcting codes to store the access data with a high degree of reliability, but may use one error correcting code to store other data for easy retrieval, with reduced overhead, or the like. ECC chunks encoding data and access data are described in further detail below with regard to FIG. 5A, FIG. 5B, and FIG. 5C.	95	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In various embodiments, the secondary error correcting code may comprise one of various types of error correcting codes, such as a block code, a convolutional code, a Bose-Chaudhuri-Hocquenghem (BCH) code, a low-density parity check (LDPC) code, a Hamming code, a turbo code, a Reed-Solomon code, a Walsh-Hadamard code, a Hadamard code, another code from the Reed-Muller family, or the like. In a certain embodiment, the secondary error correcting code may include a repetition error correcting code or replication error correcting code. As described below, a replication or repetition error correcting code may repeat a message multiple times to increase the probability that a majority of the repeated messages will be correct. In one embodiment, the secondary error correcting code may be a systematic code, so that each code word for the secondary error correcting code stores data received by an encoder for the secondary error correcting code, as well as parity bits, or check bits. In another embodiment, the secondary error correcting code may be a non-systematic code, so that the data as originally received by an encoder for the secondary error correcting code may not appear in the code word.	94	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	As described above, error information may comprise data associated with one or more errors or potential errors for one or more ECC chunks. In various embodiments, error information that the secondary ECC module 304 determines may include information related to decoding, and/or attempting to decode, the at least one ECC chunk using one or more levels of error correcting codes. Thus, in one embodiment, the error information may include information from a decoder of the secondary ECC module 304 for the secondary error correcting code. In another embodiment, the error information may include primary error information determined by the primary ECC module 302 using the primary error correcting code, secondary error information determined by the secondary ECC module 304 using the secondary error correcting code, and/or additional error information related to one or more additional error correcting codes. In a further embodiment, the error information may include “outer” error information determined by using the primary error correcting code to attempt to decode the at least one ECC chunk, and “inner” error information determined by using the secondary error correcting code to attempt to decode the at least one ECC chunk. As described above with regard to the primary ECC module 302, error information may include an indication of whether or not an ECC chunk is correctable using one or more of the error correcting codes, the number and/or location of bits in error, a raw bit error rate (RBER), an uncorrectable bit error rate (UBER), a ratio of bits which store a binary zero to bits which store a binary one in the decoded data (e.g., a DC balance as described below), or other information related to decoding (or attempting to decode) the at least one ECC chunk using one or more levels of error correcting codes.	93	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In one embodiment, the secondary ECC module 304 may include, control, or otherwise cooperate with a decoder for the secondary error correcting code, a third error correcting code, and/or one or more additional error correcting codes. In some embodiments, the secondary ECC module 304 may additionally include, control, or otherwise cooperate with an encoder for the secondary error correcting code, a tertiary/third error correcting code, and/or one or more additional error correcting codes. An encoder of the secondary ECC module 304 may encode data of the at least one ECC chunk using the secondary error correcting code (e.g., an inner error correcting code, a replication error correcting code, or the like). The primary ECC module 302, in certain embodiments, may provide an ECC chunk protected or encoded using the secondary error correcting code as in inner error correcting code to the primary ECC module 302, for nesting or embedding within another ECC chunk encoded using the primary, or outer, error correcting code as described above. In other embodiments, encoders and/or decoders of the primary ECC module 302 and the secondary ECC module 304 may operate on different data, without nesting or embedding multiple levels or layers of error correcting codes in the same ECC chunks or code words.	92	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In various embodiments, a means for obtaining error information by decoding the at least one ECC chunk using a secondary error correcting code may include a secondary ECC module 304, a configuration module 150, a non-volatile memory controller 124, a non-volatile memory media controller 126, a device driver such as an SML 130, a processor 111, a read pipeline 241, other logic hardware and/or other executable code stored on a computer readable storage medium. Other embodiments may include similar or equivalent means for obtaining error information using the secondary error correcting code.	91	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In some embodiments, the secondary ECC module 304 may be configured to determine or obtain error information by decoding (or attempting to decode) the at least one ECC chunk using a secondary error correcting code, a secondary and tertiary/third error correcting code, or the like. In certain embodiments, the secondary ECC module 304 may determine or obtain error information, including determining whether the at least one ECC chunk is correctable using the secondary error correcting code, in response to the primary ECC module 302 determining that the at least one ECC chunk is uncorrectable using the primary error correcting code.	90	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	The secondary ECC module 304, in one embodiment, is configured to determine whether at least one ECC chunk encoded with a secondary error correcting code is correctable using the secondary error correcting code. In certain embodiments, the secondary error correcting code may be different from the primary error correcting code described above with regard to the primary ECC module 302. As described above, the primary ECC module 302 and the secondary ECC module 302 may operate on different data (e.g., the primary ECC module 302 may encode and/or decode user data, workload data, client data or the like and the secondary ECC module 304 may encode and/or decode access data), or, in certain embodiments, the primary ECC module 302 and the secondary ECC module 304 may operate on at least a portion of the same data in a nested manner (e.g., the primary ECC module 302 may encode and/or decode each ECC chunk and the secondary ECC module 304 may encode and/or decode a subset of ECC chunks, such as access data, using multiple levels or layers of error correcting codes).	89	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In other embodiments, the primary ECC module 302 may encode and/or decode a first set of data (e.g., user data, workload data, client data) and the secondary ECC module 304 may encode and/or decode a secondary, different set of data (e.g., access data) with one or more additional error correcting codes (e.g., a stronger error correcting code, a replication code, or the like as described below). In some embodiments, the primary ECC module 302 may include, control, or otherwise cooperate with an encoder for the primary error correcting code, which encodes access data and/or other data so it can be written to the non-volatile memory media 122. In a certain embodiment, the write pipeline 240 may include the encoder for the primary error correcting code, and the read pipeline 241 may include the decoder for the primary error correcting code.	88	Added by DJM 2 2021	2/22/21, 12:00 AM

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