Dave's PCF WIP: Paragraphs

Paragraphs

Actions	Matter	Content	Para #	Notes	Modified
View Edit Delete	US-20150012794-A1	In some embodiments the log format may comprise storing data in an “append only” paradigm. The non-volatile memory controller may maintain a current append point at a media address of the non-volatile memory device. The append point may be a current memory division and/or offset within a memory division. Data may then be sequentially appended from the append point. The sequential ordering of the data, therefore, may be determined based upon the sequence indicator of the memory division of the data in combination with the sequence of the data within the memory division. Upon reaching the end of a memory division, the non-volatile memory controller may identify the “next” available memory division (the next memory division that is initialized and ready to store data). The groomer may reclaim memory divisions comprising invalid, stale, and/or deleted data, to ensure that data may continue to be appended to the media log.	48	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	The non-volatile memory controller may be further configured to store data in a log format. As described above, a log format refers to a data format that defines an ordered sequence of storage operations performed on a non-volatile memory media. In some embodiments, the log format comprises storing data in a pre-determined sequence of media addresses of the non-volatile memory media (e.g., within sequential pages and/or erase blocks of the media). The log format may further comprise associating data (e.g., each packet or data segment) with respective sequence indicators. The sequence indicators may be applied to data individually (e.g., applied to each data packet) and/or to data groupings (e.g., packets stored sequentially on a memory division, such as an erase block). In some embodiments, sequence indicators may be applied to memory divisions when the memory divisions are reclaimed (e.g., erased), as described above, and/or when the memory divisions are first used to store data.	47	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In some embodiments, the non-volatile memory controller comprises a groomer, which is configured to reclaim memory divisions (e.g., erase blocks) for reuse. The write out-of-place paradigm implemented by the non-volatile memory controller may result in obsolete or invalid data remaining on the non-volatile memory media. For example, overwriting data X with data Y may result in storing Y on a new memory division (rather than overwriting X in place), and updating the any-to-any mappings of the metadata to identify Y as the valid, up-to-date version of the data. The obsolete version of the data X may be marked as invalid, but may not be immediately removed (e.g., erased), since, as discussed above, erasing X may involve erasing an entire memory division, which is a time-consuming operation and may result in write amplification. Similarly, data that is no longer is use (e.g., deleted or trimmed data) may not be immediately removed. The non-volatile memory media may accumulate a significant amount of invalid data. A groomer process may operate outside of the critical path for servicing storage operations. The groomer process may reclaim memory divisions so that they can be reused for other storage operations. As used herein, reclaiming a memory division refers to erasing the memory division so that new data may be stored/programmed thereon. Reclaiming a memory division may comprise relocating valid data on the memory division to a new location. The groomer may identify memory divisions for reclamation based upon one or more factors, which may include, but are not limited to: the amount of invalid data in the memory division, the amount of valid data in the memory division, wear on the memory division (e.g., number of erase cycles), time since the memory division was programmed or refreshed, and so on.	46	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	The non-volatile memory controller may comprise one or more processes that operate outside of the regular path for servicing of storage operations (the “path” for performing a storage operation and/or servicing a storage request). As used herein, the “path for servicing a storage request” or “path for servicing a storage operation” (also referred to as the “critical path”) refers to a series of processing operations needed to service the storage operation or request, such as a read, write, modify, or the like. The path for servicing a storage request may comprise receiving the request from a storage client, identifying the logical addresses of the request, performing one or more storage operations on non-volatile memory media, and returning a result, such as acknowledgement or data. Processes that occur outside of the path for servicing storage requests may include, but are not limited to: a groomer, de-duplication, and so on. These processes may be implemented autonomously and in the background, so that they do not interfere with or impact the performance of other storage operations and/or requests. Accordingly, these processes may operate independent of servicing storage requests.	45	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In some embodiments, the non-volatile memory controller may be configured to store data on one or more asymmetric, write-once media, such as solid-state storage media. As used herein, a “write once” storage medium refers to a storage medium that is reinitialized (e.g., erased) each time new data is written or programmed thereon. As used herein, an “asymmetric” storage medium refers to a storage medium having different latencies for different storage operations. Many types of solid-state storage media are asymmetric; for example, a read operation may be much faster than a write/program operation, and a write/program operation may be much faster than an erase operation (e.g., reading the media may be hundreds of times faster than erasing, and tens of times faster than programming the media). The memory media may be partitioned into memory divisions that can be erased as a group (e.g., erase blocks) in order to, inter alia, account for the asymmetric properties of the media. As such, modifying a single data segment in-place may require erasing the entire erase block comprising the data, and rewriting the modified data to the erase block, along with the original, unchanged data. This may result in inefficient “write amplification,” which may excessively wear the media. Therefore, in some embodiments, the non-volatile memory controller may be configured to write data out-of-place. As used herein, writing data “out-of-place” refers to writing data to different media storage location(s) rather than overwriting the data “in-place” (e.g., overwriting the original physical location of the data). Modifying data out-of-place may avoid write amplification, since existing, valid data on the erase block with the data to be modified need not be erased and recopied. Moreover, writing data out-of-place may remove erasure from the latency path of many storage operations (the erasure latency is no longer part of the critical path of a write operation).	44	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	FIG. 2 depicts another embodiment of a non-volatile memory controller 124 configured to adjust media parameters for non-volatile memory media 122. The non-volatile memory device 120 may comprise a non-volatile memory media controller 126 and non-volatile memory media 122. The non-volatile memory media 122 may comprise a plurality of non-volatile memory elements 123, which may be communicatively coupled to the non-volatile memory media controller 126 via a bus 127, as described above.	69	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	The primary ECC module 302, in one embodiment, is configured to determine whether at least one ECC chunk of a non-volatile memory device 120 is correctable using an error correcting code (e.g., a primary error correcting code, an outer error correcting code, or the like). In some embodiments, the error correcting code for the primary ECC module 302 may be referred to as a “primary,” “first,” or “outer” error correcting code, to distinguish it from other error correcting codes that may be used by other modules, such as the secondary ECC module 304. In various embodiments, a means for determining whether at least one ECC chunk of a non-volatile memory device 120 is correctable using a primary or first error correcting code may include a primary ECC module 302, a configuration module 150, a non-volatile memory controller 124, a non-volatile memory media controller 126, a device driver such as an SML 130, a processor 111, a read pipeline 241, other logic hardware and/or other executable code stored on a computer readable storage medium. Other embodiments may include similar or equivalent means for determining if the ECC chunk is correctable using a primary or first error correcting code. In a further embodiment, the primary ECC module 302 may be configured to determine primary or first error information using a primary error correcting code to attempt to decode the at least one ECC chunk.	77	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In the depicted embodiment, the configuration module 150 includes a primary ECC module 302, a secondary ECC module 304, and an adjustment module 306. The primary ECC module 302 and the secondary ECC module 304 may provide different levels of error protection and/or detection and may determine error information for data using one or more of the different levels of error protection. The adjustment module 306 may adjust one or more media parameters for the non-volatile memory media 122, or the like, based at least in part upon error information determined by the primary ECC module 302 and/or the secondary ECC module 304, as described in greater detail below. A level or strength of an error correcting code, as used herein, may comprise a number of bit errors that the error correcting code is capable of detecting and/or correcting, an error rate which the error correcting code is capable of correcting, or the like. A level or strength of an error correcting code may be relative to a number of bits, an overhead or code rate (e.g., a proportion of user data to total data including ECC check bits) for the error correcting code, or the like.	76	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	FIG. 3 depicts one embodiment of a configuration module 150. The configuration module 150 may be substantially similar to the configuration module 150 described above with regard to FIGS. 1A, 1B, and 2. In general, as described above, the configuration module 150 adjusts media parameters for non-volatile memory media 122 based on error information for an error correcting code (ECC) chunk with multiple levels or layers of error correcting codes. Adjusting media parameters based on multiple levels of error correcting codes for at least one ECC chunk may allow the non-volatile memory device 120 to store and/or retrieve additional ECC chunks using a weaker error correcting code, with lower overhead or the like.	75	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	The non-volatile memory media controller 126 may further comprise a multiplexer 249 that is configured to selectively route data and/or commands to/from the write pipeline 240 and the read pipeline 241. In some embodiments, non-volatile memory media controller 126 may be configured to read data while filling a buffer of the write pipeline 240 and/or may interleave one or more storage operations on one or more banks of non-volatile memory elements 123 (not shown).	74	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	The non-volatile memory media controller 126 may further comprise a read pipeline 241 that is configured to read contextual data from the non-volatile memory media 122 in response to requests received via the bus 125. The requests may comprise a logical address of the requested data, a media address of the requested data, and so on. The read pipeline 241 may be configured to read data stored in a contextual format from the non-volatile memory media 122 and to provide the data to the SML 130 and/or a storage client 116. The read pipeline 241 may be configured to determine the media address of the data using a logical address of the data and the metadata 135. Alternatively, or in addition, the SML 130 may determine the media address of the data and may include the media address in the request. The log storage module 248 may provide the media address to the non-volatile memory elements 123, and the data may stream into the read pipeline 241 via a buffer. The read pipeline 241 may comprise one or more read synchronization buffers for clock domain synchronization, as described above.	73	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	Upon writing data to the non-volatile memory media, the non-volatile memory media controller 126 may be configured to update metadata 135 (e.g., a forward index) to associate the logical address(es) of the data with the media address(es) of the data on the non-volatile memory media 122. In some embodiments, the metadata 135 may be maintained on the non-volatile memory media controller 126; for example, the metadata 135 may be stored on the non-volatile memory media 122, on a volatile memory (not shown), or the like. Alternatively, or in addition, the metadata 135 may be maintained within the SML 130 (e.g., on a volatile memory 112 of the computing device 110 of FIGS. 1A and 1B). In some embodiments, the metadata 135 may be maintained in a volatile memory by the SML 130, and may be periodically stored on the non-volatile memory media 122.	72	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	The log storage module 248 may be configured to select media location(s) for the data and may provide addressing and/or control information to the non-volatile memory elements 123 via the bus 127. In some embodiments, the log storage module 248 is configured to store data sequentially in a log format within the non-volatile memory media. The log storage module 248 may be further configured to groom the non-volatile memory media, as described above. In certain embodiments the log storage module 248 is substantially similar to the log storage module 137 as described above. The log storage module 248 may be executed by the SML 130 and/or by the non-volatile memory media controller 126.	71	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	The non-volatile memory media controller 126 may comprise a write pipeline 240 that is configured to store data on the non-volatile memory media 122 in a contextual format in response to requests received via the bus 125. The requests may include and/or reference data to be stored on the non-volatile memory media 122, may include logical address(es) of the data, and so on. As described above, the contextual format may comprise storing a logical address of the data in association with the data on the non-volatile memory media 122. For example, the write pipeline 240 may be configured to format data into packets, and may include the logical address of the data in a packet header (or other packet field). The write pipeline 240 may be configured to buffer data for storage on the non-volatile memory media 122. In some embodiments, the write pipeline 240 may comprise one or more synchronization buffers to synchronize a clock domain of the non-volatile memory media controller 126 with a clock domain of the non-volatile memory media 122 (and/or bus 127).	70	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	In some embodiments, the contextual data format may allow data context to be determined (and/or reconstructed) based upon the contents of the non-volatile memory media, and independently of other metadata, such as the arbitrary, any-to-any mappings discussed above. Since the media location of data is independent of the logical address of the data, it may be inefficient (or impossible) to determine the context of data based solely upon the media location or media address of the data. Storing data in a contextual format on the non-volatile memory media may allow data context to be determined without reference to other metadata. For example, the contextual data format may allow the metadata to be reconstructed based only upon the contents of the non-volatile memory media (e.g., reconstruct the any-to-any mappings between logical addresses and media locations).	43	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	The non-volatile memory system 102 may further comprise a log storage module 137, which, as described above, may be configured to store data on the non-volatile memory device 120 in a contextual, log format. The contextual, log data format may comprise associating data with a logical address on the non-volatile memory media 122. The contextual, log format may further comprise associating data with respective sequence identifiers on the non-volatile memory media 122, which define an ordered sequence of storage operations performed on the non-volatile memory media 122, as described above. The non-volatile memory controller 124 may further comprise a non-volatile memory device interface 139 that is configured to transfer data, commands, and/or queries to the non-volatile memory media controller 126 over a bus 125, as described above.	68	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	As described above, the SML 130 may present a logical address space 134 to the storage clients 116 (through the interfaces 131, 132, and/or 133). The SML 130 may maintain metadata 135 comprising any-to-any mappings between logical addresses in the logical address space 134 and media locations on the non-volatile memory device 120. The metadata 135 may comprise a logical-to-physical mapping structure with entries that map logical addresses in the logical address space 134 and media locations on the non-volatile memory device 120. The logical-to-physical mapping structure of the metadata 135, in one embodiment, is sparsely populated, with entries for logical addresses for which the non-volatile memory device 120 stores data and with no entries for logical addresses for which the non-volatile memory device 120 does not currently store data. The metadata 135, in certain embodiments, tracks data at a block level, with the SML 130 managing data as blocks.	67	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	The non-volatile memory controller 124 may comprise a SML 130 and the non-volatile memory media controller 126. The SML 130 may provide storage services to the storage clients 116 via one or more interfaces 131, 132, and/or 133. In some embodiments, the SML 130 provides a block-device I/O interface 131 through which storage clients 116 perform block-level I/O operations. Alternatively, or in addition, the SML 130 may provide a storage management layer (SML) interface 132, which may provide other storage services to the storage clients 116. In some embodiments, the SML interface 132 may comprise extensions to the block device interface 131 (e.g., storage clients 116 may access the SML interface 132 through extensions to the block device interface 131). Alternatively, or in addition, the SML interface 132 may be provided as a separate API, service, and/or library. The SML 130 may be further configured to provide a cache interface 133 for caching data using the non-volatile memory system 102.	66	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	The non-volatile memory media controller 126 may be communicatively coupled to the non-volatile memory media 122 by way of a bus 127. The bus 127 may comprise an I/O bus for communicating data to/from the non-volatile memory elements 123. The bus 127 may further comprise a control bus for communicating addressing and other command and control information to the non-volatile memory elements 123. In some embodiments, the bus 127 may communicatively couple the non-volatile memory elements 123 to the non-volatile memory media controller 126 in parallel. This parallel access may allow the non-volatile memory elements 123 to be managed as a group, forming a logical memory element 129. As discussed above, the logical memory element may be partitioned into respective logical memory units (e.g., logical pages) and/or logical memory divisions (e.g., logical erase blocks). The logical memory units may be formed by logically combining physical memory units of each of the non-volatile memory elements. For example, if the non-volatile memory media 122 comprises twenty-five (25) non-volatile memory elements, each logical memory unit may comprise twenty-five (25) pages (a page of each element of non-volatile memory media 122).	65	Added by DJM 2 2021	2/22/21, 12:00 AM
View Edit Delete	US-20150012794-A1	The non-volatile memory media 122 may comprise one or more non-volatile memory elements 123, which may include, but are not limited to: chips, packages, planes, die, and the like. A non-volatile memory media controller 126 may be configured to manage storage operations on the non-volatile memory media 122, and may comprise one or more processors, programmable processors (e.g., field-programmable gate arrays), or the like. In some embodiments, the non-volatile memory media controller 126 is configured to store data on (and read data from) the non-volatile memory media 122 in the contextual, log format described above, and to transfer data to/from the non-volatile memory device 120, and so on.	64	Added by DJM 2 2021	2/22/21, 12:00 AM

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