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US-8380915-A1 The data set, in a further embodiment, was originally stored in the storage cells with a known bias. For example, the data set may be from a packet that the bias module 318 biased, may be from storage cells of the solid-state storage media 110 that are in a virgin state, storing default data or other data programmed to the solid-state storage media 110 with a known bias for example by a manufacturer of the solid-state storage media 110, or the like. 187 Added by DJM 3 2021 3/12/21, 12:00 AM
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US-8380915-A1 The configuration module 352, in one embodiment, uses a known bias and/or an error bias for a data set from the ECC decoder 322 in response to one or more correctable bit errors in the data set. In a further embodiment, the configuration module 352 uses an expected bias that is based on a reversible biasing algorithm as a known bias. In certain embodiments, the expected bias is used as the known bias in response to one or more uncorrectable bit errors in the data set. An error bias from the ECC decoder 322 may not be available to the configuration module 352 for uncorrectable bit errors because the uncorrectable bit error condition makes the bias undefined. For uncorrectable bit errors in a data set, in certain embodiments, the read bias of the data set may deviate from the known, expected bias for the data set more than for correctable bit errors, because of the greater severity of the errors. Due to the greater magnitude of deviation of the read bias of a data set from the known, expected bias of the data set for uncorrectable bit errors, the bias information from the inverse bias module 332 may provide a better indicator of a direction for a configuration parameter adjustment 358 for uncorrectable bit errors than for correctable bit errors. 176 Added by DJM 3 2021 3/12/21, 12:00 AM
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US-8380915-A1 Because the ECC decoder 322, for correctable errors, determines the exact, original, correct values of bits (known bias) of a data set and an exact location of bits in error (error bias) of the data set the configuration module 352 can determine an exact deviation of the data set from the known bias. For this reason, in certain embodiments, the configuration module 352 may make more precise configuration parameter adjustments 358 using a known bias and an error bias from the ECC decoder 322, when available, than using an expected bias and a read bias from the inverse bias module 332. 175 Added by DJM 3 2021 3/12/21, 12:00 AM
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US-8380915-A1 The ECC decoder 322, in one embodiment, provides a known bias and/or a read bias for a data set to the configuration module 352. The ECC decoder 322 may provide a known bias for a data set having a correct state of bits for the data set. For example, once the ECC decoder 322 has corrected one or more correctable bit errors in a data set, the ECC decoder 322 may provide the error corrected state of the bits of the data set to the configuration module 352 as a known bias with which the data set was written to the solid-state storage media 110. The ECC decoder 322, in a further embodiment, may provide the read bias for a data set as an error bias that indicates one or more bits of a data set that were in error when the data set was read from the solid-state storage media 110. 174 Added by DJM 3 2021 3/12/21, 12:00 AM
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US-8380915-A1 In one embodiment, the inverse bias module 332 provides a read bias of a data set read from the solid-state storage media 110 to the configuration module 352. For example, as the inverse bias module 332 converts biased data packets or other data sets back to their original source form by reversing the biasing process of the bias module 318, the inverse bias module 332 may determine, measure, or detect the read bias of the data packets or other data sets. The inverse bias module 332 may determine a read bias prior to, during, or after reversing the biasing process, depending on the biasing process used. In certain embodiments, if the inverse bias module 332 determines that a read bias of a data set deviates from the known/expected bias of the data set, the inverse bias module 332 may provide the data set to the configuration module 352 to make a configuration parameter adjustment 358 to storage cells of the data set so that the data set may be re-read. In other embodiments, as described above with regard to FIG. 3A, the configuration module 352 may adjust a read voltage threshold for a data set before the inverse bias module 332 receives the data set. One of skill in the art, in light of this specification, will recognize other arrangements of the configuration module 352, the inverse bias module 332, and the ECC decoder 322, each of which fall within the scope of the present invention. 173 Added by DJM 3 2021 3/12/21, 12:00 AM
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US-8380915-A1 For example, where the bias module 318 biases data toward a balance of one half binary ones and one half binary zeroes, which may also be referred to as a direct current (“DC”) balance, a range of actual biases for biased data may range between about forty-six percent binary ones and fifty-four percent binary ones, or the like. The known bias and the read bias of the data set, in other embodiments, may also be based on multi-bit symbols or patterns of bits instead of being based exclusively on individual binary ones and zeroes, or the like. While the inverse bias module 332, in the depicted embodiment 301, provides input to the configuration module 352, in certain embodiments, the bias module 318 may provide an expected bias to the configuration module 352 as a known bias, the known bias may be hard coded or programmed into the configuration module 352, or the like. 172 Added by DJM 3 2021 3/12/21, 12:00 AM
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US-8380915-A1 In another embodiment, the inverse bias module 332 may provide the expected bias as a range, a distribution, an average, an estimate, or the like based on the reversible biasing algorithm that the bias module 318 applies to data. For example, the inverse bias module 332 may measure or learn an expected bias over time as the inverse bias module 332 applies an inverse biasing algorithm to data read from the solid-state storage media 110. In one embodiment, the expected bias may be mathematically or otherwise derived from the reversible biasing algorithm of the bias module 318 as a range or distribution of possible or likely biases. 171 Added by DJM 3 2021 3/12/21, 12:00 AM
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US-8380915-A1 The inverse bias module 332, in one embodiment, provides a known bias and/or an actual read bias of a data set to the configuration module 352. The inverse bias module 332 may provide the known bias as an expected bias based on a reversible biasing algorithm that the bias module 318 applies to data written to the solid-state storage media 110. The expected bias, in certain embodiments, may be an exact bias, where the bias module 318 uses a reversible biasing algorithm that biases data to exactly match a bias. For example, the bias module 318 may add padding data to a data set so that the data set has an exact balance of binary ones and binary zeroes, or the like, and the known bias may be exact. 170 Added by DJM 3 2021 3/12/21, 12:00 AM
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US-8380915-A1 In the depicted embodiment 301, the configuration module 352 receives inputs from the inverse bias module 332, the ECC decoder 322, and the device factor module 354 and the configuration module 352 determines a configuration parameter adjustment 358 based on the inputs. In other embodiments, the configuration module 352 may receive inputs from just the inverse bias module 332, from just the ECC decoder 322, from just the device factor module 354, or from a different combination of the inverse bias module 332, the ECC decoder 322, and/or the device factor module 354. 169 Added by DJM 3 2021 3/12/21, 12:00 AM
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US-8380915-A1 In one embodiment, the deviation module 404 determines that a read bias for a data set deviates from a known bias with which the data set was originally stored. The read bias of the data set deviates from the known bias when there is a difference between the read bias and the known bias. In one embodiment, where the known bias is exact, such as where the known bias includes error corrected bit values or where the bias module 318 biases to an exact bias, the deviation module 404 may determine that any difference between a read bias and the known bias comprises a deviation from the known bias. In other embodiments, the known bias may include an average bias, an estimated bias, a distribution of biases, a range of biases, or the like. The deviation module 404, in these embodiments, may determine that a read bias outside of a range or distribution of known biases, at least a predefined deviation threshold away from a known bias, or the like deviates from the known bias. 196 Added by DJM 3 2021 3/12/21, 12:00 AM
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US-8380915-A1 The direction module 406, in one embodiment, may determine the direction by subtracting a ratio, proportion, or other representation of the known bias from a representation of the read bias of the data set. For example, in one embodiment, the direction module 406 may subtract the proportion of binary ones, zeroes, multi-bit binary symbols, or the like that are expected based on the known bias from the proportion of binary ones, zeroes, multi-bit binary symbols, or the like that are in the data set. Depending on whether ratios of binary ones are compared or ratios of binary zeroes are compared and whether a high voltage represents a binary one or a binary zero, or other specific architectures of the storage cells, the direction module 406 may invert the difference or perform another transform to determine the direction. 205 Added by DJM 3 2021 3/12/21, 12:00 AM
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US-8380915-A1 In one embodiment, the direction module 406 determines a direction of deviation for the data set. The direction of deviation, in one embodiment, is a difference between the read bias of the data set and the known bias. The direction or difference may be represented as a value, a sign (i.e. positive or negative), a relationship (i.e. greater than, less than), a direction (i.e. up, down), or the like. The direction module 406, in certain embodiments, may determine a direction of deviation based on an encoding type used for storage cells of the solid-state storage media 110, based on a physical and/or electrical architecture of the storage cells of the storage media 110, or the like. For example, the direction module 406 may examine the bias deviation in the data set to determine a direction of deviation based on a storage media type (2-bit MLC, 3-bit MLC, n-bit-MLC), which page of a multi-phase programming model was read, an encoding type for the solid-state storage media 110 (such as a Gray code encoding type, a binary code encoding type, or the like), and/or a magnitude of the determined deviation. 204 Added by DJM 3 2021 3/12/21, 12:00 AM
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US-8380915-A1 The deviation module 404, in one embodiment, checks the read bias of each data set that the data set read module 402 reads. For example, if the data set read module 402 uses the monitor module 418, the deviation module 404 may monitor the read biases of data sets regularly as they are read from the solid-state storage media 110. The monitor module 418, in one embodiment, may compare read biases of each data set that is requested by a client. In a further embodiment, the monitor module 418 may check read biases of requested data sets for example at regular intervals, and/or in response to a command, or the like. In another embodiment, if the data set read module 402 uses the read error module 420, the deviation module 404 may check the read bias of a data set in response to a data error, as part of a testing operation, or the like. 203 Added by DJM 3 2021 3/12/21, 12:00 AM
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US-8380915-A1 As described in greater detail below with regard to FIG. 6C, in certain embodiments, the data set read module 402 may read a data set that includes only a subset of the bits stored by a grouping of multi-level storage cells, and the deviation module 404 may determine whether or not the read bias of the data set deviates from the known bias based on the subset of the bits. For example, a data set may include only data values from LSBs (lower pages), only values from MSBs (upper pages), or the like. In another embodiment, the deviation module 404 may determine whether or not a read bias of a data set deviates from a known bias based at least partially on an encoding type used for storage cells of the solid-state storage media 110, a physical and/or electrical architecture of the storage cells of the storage media 110, or the like. In other embodiments, the deviation module 404 may perform a transform on a data set that may combine data from different pages to include both LSB and MSB bits in a single data set, to coordinate LSB and MSB bits and/or pages from different data sets, or the like. 202 Added by DJM 3 2021 3/12/21, 12:00 AM
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US-8380915-A1 Thus, the MSB and LSB in the same multi-level storage cell may have different addresses in the storage device 102. In certain embodiments, the upper page includes the MSBs of a plurality of multi-level storage cells, and the lower page includes the LSBs of the same multi-level storage cells. Writes directed to the upper page may therefore cause changes only in the MSBs of the associated multi-level storage cells, while writes directed to the lower page cause changes only in the LSBs of the associated multi-level storage cells. 201 Added by DJM 3 2021 3/12/21, 12:00 AM
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US-8380915-A1 For example, as described below with regard to FIG. 6C, a multi-level storage cell stores at least a most significant bit (“MSB”) and a least significant bit (“LSB”). In certain embodiments, the MSB and the LSB, though part of the same physical multi-level storage cell, may be assigned to different pages of the solid-state storage media 110. In certain embodiments, a plurality of the multi-level storage cells are organized on the solid-state storage media 110 (such as NAND flash for example) as a physical page. In certain solid-state storage media 110, a physical page is the smallest unit that can be written to the solid-state storage media 110. In such embodiments, a multi-level storage cell may be associated with a page pair. A page pair is a pair of pages (upper and lower) that are associated with a single set of physical multi-level storage cells. For example, a multi-level storage cell may be associated with a page pair that includes an upper page and a lower page. An upper page may be associated with the MSBs, and the lower page may be associated with the LSBs, or vice versa. 200 Added by DJM 3 2021 3/12/21, 12:00 AM
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US-8380915-A1 In embodiments where the known bias includes a pattern of bits, multi-bit binary symbols, or the like, the deviation module 404 may perform a transform on bits of the data set, may analyze a subset of bits of the data set, or the like to determine whether the read bias of the data set deviates from the known bias. For example, the deviation module 404 may perform a transform based on an encoding type used for storage cells of the solid-state storage media 110, such as a Gray code encoding type, a binary code encoding type, or the like. The transform, in certain embodiments, may be based on a physical and/or electrical architecture of the storage cells of the storage media 110. 199 Added by DJM 3 2021 3/12/21, 12:00 AM
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US-8380915-A1 The deviation module 404, in one embodiment, determines whether the read bias of the data set deviates from the known bias by comparing the read bias to the known bias. The deviation module 404 may compare the read bias to the known bias by counting the number of binary ones and the number of binary zeroes in the data set to determine the ratio of binary ones and binary zeroes in the data set and comparing that ratio to a ratio of the known bias. In a further embodiment, the deviation module 404 may search for and/or count the occurrences of an expected pattern or other expected attribute of the known bias and compare the results of a similar search and/or count in the data set to the expected attribute. In certain embodiments, the ECC decoder 322 indicates to the deviation module 404 that the read bias of the data set deviates from the known bias by providing an error bias for the data set to the configuration module 352, or the like. 198 Added by DJM 3 2021 3/12/21, 12:00 AM
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US-8380915-A1 In one embodiment, the difference between the read bias of the data set and the known bias may be a difference in the ratios of binary ones and binary zeroes. In other embodiments, the difference between the bias of the data set and the known bias may be a difference in a binary pattern, a difference in multi-bit binary symbols, or the like. As described above with regard to FIG. 3B, in various embodiments, the deviation module 404 may receive an original, known bias and/or a read bias for a data set from the ECC decoder 322, from the inverse bias module 332, or the like. 197 Added by DJM 3 2021 3/12/21, 12:00 AM
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US-8380915-A1 FIG. 3B is a schematic block diagram illustrating another embodiment 301 of a solid-state storage controller 104. In the depicted embodiment 301, the solid-state storage controller 104 includes a device factor module 354, the inverse bias module 332, the ECC decoder 322, and the configuration module 352. Although not depicted in FIG. 3B, the solid-state storage controller 104 of the embodiment illustrated in FIG. 3B may also, in certain embodiments, include one or more additional modules or other elements from the solid-state storage controller 104 depicted in FIG. 3A, as described above. 168 Added by DJM 3 2021 3/12/21, 12:00 AM

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