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2380.2.01 The method includes receiving the data packets after packetizing and generating ECC for the data packets. The method includes buffering within a write synchronization buffer the data packets and corresponding ECC prior to writing the data packets and ECC to the solid-state storage, where the write synch buffer is at a boundary between a local clock domain and a solid-state storage clock domain. The method includes writing the data packets from the write synchronization buffer to the solid-state storage over a bi-directional storage I/O bus. 24 Added by DJM 3 2021 3/16/21, 12:00 AM
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2380.2.01 A method of the present invention is also presented for managing data on a solid-state storage device. The method in the disclosed embodiments substantially includes the steps necessary to carry out the functions presented above with respect to the operation of the described apparatus and system. In one embodiment, the method includes receiving in an input buffer a data segment to be written to a solid-state storage of a solid-state storage device, where the data segment includes at least a portion of an object. The solid-state storage includes an array of non-volatile, solid-state data storage elements. The method includes receiving the data segment from the input buffer and packetizing the data segments, where packetizing the data segments includes creating one or more data packets sized for the solid-state storage where each data packet includes a header and data from the data segment. 23 Added by DJM 3 2021 3/16/21, 12:00 AM
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2380.2.01 The system may further include, in one embodiment, a client in communication with the computer over a computer network, where the client transmits data requests to the solid-state storage device coupled to the computer over the computer network. In various embodiments, system bus includes a peripheral component interconnect express (“PCI-e”) bus, a Serial Advanced Technology Attachment (“serial ATA”) bus, an Ethernet bus, a universal serial bus (“USB”) connection, and an Institute of Electrical and Electronics Engineers (“IEEE”) 1394 bus, Infiniband, or any combination of the system bus types. In another embodiment, the computer accesses data in the solid-state storage device using direct memory access (“DMA”) or remote DMA (“RDMA”). 22 Added by DJM 3 2021 3/16/21, 12:00 AM
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2380.2.01 The write data pipeline includes a packetizer that receives a data segment to be written to the solid-sate storage and creates one or more data packets sized for the solid-state storage, where each data packet includes a header and data from the data segment. The write data pipeline includes an ECC generator that generates ECC for the one or more data packets received from the packetizer prior to writing the data packets to the solid-state storage. 20 Added by DJM 3 2021 3/16/21, 12:00 AM
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2380.2.01 A system of the present invention is also presented to manage data in a solid-state storage device. The system may be embodied by a computer, a system bus, and a solid-state storage device coupled to the computer through the system bus. In particular, the solid-state storage, in one embodiment, includes an array of non-volatile, solid-state data storage elements accessed using a bi-directional storage I/O bus and a solid-state storage controller in communication with the solid-state storage via the storage I/O bus. The solid-state controller includes a write data pipeline to write data segments to the solid-state storage a read data pipeline to request data packets stored in the solid-state storage device in response to a read request. The data segment includes at least a portion of an object 19 Added by DJM 3 2021 3/16/21, 12:00 AM
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2380.2.01 In one embodiment, the solid-state storage device includes a system I/O bus connecting the controller to an external device. In another embodiment, the solid-state storage device is configured in a dual-inline memory module (“DIMM”). In another embodiment, the data packets written to the solid-state storage by the write data pipeline and the requested data packets read from the solid-state memory into the read data pipeline are multiplexed together onto the storage I/O bus. In various embodiments, the solid-state storage of the solid-state storage device may be nano random access memory (“nano RAM” or “NRAM”), magneto-resistive RAM (“MRAM”), dynamic RAM (“DRAM”), phase change RAM (“PRAM”) flash memory, etc. In another embodiment, the write data pipeline includes a write program module that includes one or more user-definable functions within the write data pipeline. In yet another embodiment, the read data pipeline includes a read program module that includes one or more user-definable functions within the read data pipeline. 18 Added by DJM 3 2021 3/16/21, 12:00 AM
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2380.2.01 In one embodiment, the write data pipeline includes a media encryption module that receives the one or more data packets from the packetizer and encrypts the one or more data packets using an encryption key unique to the solid-state storage device prior to sending the data packets to the ECC generator and the read data pipeline includes a media decryption module that receives one or more encrypted requested data packets from the ECC correction module and decrypts the one or more requested data packets using the encryption key unique to the solid-state storage device prior to sending the one or more requested data packets to the depacketizer. In another embodiment, the media encryption module encrypts a first data packet with the encryption key unique to the solid-state storage device and passes on a second data packet to the ECC generator without encryption. 17 Added by DJM 3 2021 3/16/21, 12:00 AM
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2380.2.01 In another embodiment, the write data pipeline includes a compression module that compresses the data segment prior to sending the data segment to the packetizer and the read data pipeline includes a decompression module that decompresses a data segment formatted by the depacketizer. In yet another embodiment, the compression module compresses a first data segment with a first compression routine and either passes along a second data segment without compression or compresses the second data segment with a second compression routine. 16 Added by DJM 3 2021 3/16/21, 12:00 AM
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2380.2.01 In one embodiment, the write data pipeline includes a write synchronization buffer that buffers data packets received from the ECC generator prior to writing the data packets to the solid-state storage, where the write synch buffer is at a boundary between a local clock domain and a solid-state storage clock domain, and the read data pipeline includes a read synchronization buffer that buffers one or more requested data packets read from the solid-state storage prior to processing by the read data pipeline, where the read synchronization buffer is at a boundary between the solid-state storage clock domain and the local bus clock domain. In another embodiment, the packetizer receives data segments from a device writing the data segment to the solid-state storage or from the read data pipeline, where a data segment received from the read data pipeline includes data being copied from an erase block within the solid-state storage prior to erasing data in the erase block. 15 Added by DJM 3 2021 3/16/21, 12:00 AM
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2380.2.01 In the embodiment, the method includes receiving requested data packets after correcting errors and depacketizing the data packets, depacketizing the data packets comprising checking and removing one or more packet headers. Also in the embodiment, the method includes receiving data packets after depacketizing, removing unwanted data, and re-formatting the data packets as data segments of an object in a form compatible with a device requesting the data segment. In the embodiment, the method also includes receiving, in an output buffer, requested data packets after depacketizing and storing the data packets prior to transmission to the requesting device. 26 Added by DJM 3 2021 3/16/21, 12:00 AM
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2380.2.01 The read data pipeline includes an ECC correction module that receives a requested data packet from the solid-state storage, determines if a data error exists in a requested data packet using ECC stored with the requested data packet, corrects an error in the requested data packet in response to determining that the error exists and the error being correctable by the ECC, and interrupts in response to determining that the detected data error is uncorrectable. The read data pipeline includes a depacketizer that receives a requested data packet from the ECC correction module and checks and removes one or more packet headers. The read data pipeline includes an alignment module that receives data from the depacketizer, removes unwanted data, and re-formats the data as data segments of an object in a form compatible with a device requesting the data segment prior to transmission to the requesting device. 13 Added by DJM 3 2021 3/16/21, 12:00 AM
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2380.2.01 The write data pipeline includes a packetizer that receives a data segment to be written to the solid-sate storage and creates one or more data packets sized for the solid-state storage. Each data packet includes a header and data from the data segment. The write data pipeline includes an ECC generator that generates one or more ECC for the one or more data packets received from the packetizer prior to writing the data packets to the solid-state storage. 12 Added by DJM 3 2021 3/16/21, 12:00 AM
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2380.2.01 The apparatus to manage data using a data pipeline is provided with a plurality of modules and hardware configured to functionally execute the necessary steps of receiving a data segment, creating packets, generating an error correcting code (“ECC”) for each packet, and storing the packets. The steps also include reading requested data packets, and determining if an error exists using the ECC, removes packet headers, and re-formats the resulting data based on the read request. The apparatus includes a solid-state storage. The solid-state storage includes an array of non-volatile, solid-state data storage elements accessed using a bi-directional storage input/output (“I/O”) bus. The apparatus includes a solid-state storage controller in communication with the solid-state storage via the storage I/O bus. The solid-state controller includes a write data pipeline to write data segments to the solid-state storage and a read data pipeline to requested data packets stored in the solid-state storage device in response to on a read request. The data segment includes at least a portion of an object. 11 Added by DJM 3 2021 3/16/21, 12:00 AM
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2380.2.01 The present invention has been developed in response to the present state of the art, and in particular, in response to the problems and needs in the art that have not yet been fully solved by currently available data storage systems. Accordingly, the present invention has been developed to provide an apparatus, system, and method for managing data that overcome many or all of the above-discussed shortcomings in the art. 10 Added by DJM 3 2021 3/16/21, 12:00 AM
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2380.2.01 From the foregoing discussion, it should be apparent that a need exists for an apparatus, system, and method that manages data using a data pipeline within a solid-state storage device. Beneficially, such an apparatus, system, and method would allow each stored data segment to be indexed and stored with different requirements, such as different compression requirements, different encryption keys, etc. 9 Added by DJM 3 2021 3/16/21, 12:00 AM
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2380.2.01 Traditional write-in-place and other data handling techniques associated data management techniques associated with write-in-place and other traditional storage prevent solid-state storage from achieving much higher possible performance. 8 Added by DJM 3 2021 3/16/21, 12:00 AM
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2380.2.01 Using write-in-place for solid-state storage can lead to premature failure of the solid-state storage because typically each cell in a solid-state storage device can only be written to a certain number of times before the cell begins to fail. Write-in-place typically does not evenly distribute writing data over the solid-state storage so some regions or addresses are used much more than other areas. This overuse of some areas can lead to premature failure of all or a portion of a solid-state storage device. 7 Added by DJM 3 2021 3/16/21, 12:00 AM
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2380.2.01 Using write-in-place for solid-state storage can be inefficient because typically writing data often takes much longer than reading data. For flash memory, which is a type of solid-state storage, changing a bit from a “zero” state (“zero”) to a “one” state (“one”) usually takes longer than changing a bit from a one to a zero. This is the case for typical flash memory that uses capacitors as cells where a zero equates to a discharged capacitor in a cell and a one equates to a charged capacitor in a cell. Typically, charging a capacitor takes longer than discharging a capacitor. 6 Added by DJM 3 2021 3/16/21, 12:00 AM
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2380.2.01 Data storage devices are typically write-in-place in that data accessed at a particular location can be modified and then put back in the same location. A file or object may be divided and placed piecemeal in the data storage device in various locations where no data is stored or where data is marked invalid. While this method works well for devices such as a hard disk drive (“HDD”), using write-in-place for solid-state storage can be inefficient and can cause premature failure. 5 Added by DJM 3 2021 3/16/21, 12:00 AM
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2380.2.01 This invention relates to data storage devices and more particularly relates to managing data in a solid-state storage device using a data pipeline. 3 Added by DJM 3 2021 3/16/21, 12:00 AM

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