11952091

Paragraph Number

15

In one embodiment, the write data pipeline includes a write synchronization buffer that buffers data packets received from the ECC generator prior to writing the data packets to the solid-state storage, where the write synch buffer is at a boundary between a local clock domain and a solid-state storage clock domain, and the read data pipeline includes a read synchronization buffer that buffers one or more requested data packets read from the solid-state storage prior to processing by the read data pipeline, where the read synchronization buffer is at a boundary between the solid-state storage clock domain and the local bus clock domain. In another embodiment, the packetizer receives data segments from a device writing the data segment to the solid-state storage or from the read data pipeline, where a data segment received from the read data pipeline includes data being copied from an erase block within the solid-state storage prior to erasing data in the erase block.

Added by DJM 3 2021