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Delete 		2380.2.01 Claim 15.The solid-state storage device of claim 10, wherein a length of the error-correcting code is predetermined to correct a particular number of bit errors in the ECC block and the length of the error-correcting code is predetermined independent of a physical page size of the solid-state storage elements. 232 Added by DJM 3 2021 3/16/21, 12:00 AM
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Delete 		2380.2.01 an ECC correction module configured to resolve an error in the ECC block read from the solid-state storage elements; and 250 Added by DJM 3 2021 3/16/21, 12:00 AM
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Delete 		2380.2.01 a depacketizer configured to access the portion of the streamed data in the ECC block. 251 Added by DJM 3 2021 3/16/21, 12:00 AM
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Delete 		2380.2.01 a read data pipeline configured to read the ECC block from the solid-state storage elements, wherein reading the ECC block comprises reading the first portion of the ECC block from the first solid-state storage element and the second portion from the second solid-state storage element, the read data pipeline comprising, 249 Added by DJM 3 2021 3/16/21, 12:00 AM
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Delete 		2380.2.01 storing a first portion of the ECC block on a page of a first one of the solid-state storage elements and a second portion of the ECC block on a page of a second one of the solid-state storage elements responsive to a single solid-state element page program command. 238 Added by DJM 3 2021 3/16/21, 12:00 AM
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Delete 		2380.2.01 generating an error-correcting code (ECC) block comprising at least a portion of one or more of the packets and an error-correcting code configured to correct an error in the ECC block, the ECC block having no fixed relationship between a size of the packets and a size of the ECC block; and 237 Added by DJM 3 2021 3/16/21, 12:00 AM
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Delete 		2380.2.01 packetizing a stream of data into one or more packets, each packet comprising at least a portion of the data stream; 236 Added by DJM 3 2021 3/16/21, 12:00 AM
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Delete 		2380.2.01 Claim 18.A computer program product stored on a non-transitory computer readable medium having computer usable program code executable to perform operations of storing data on a solid-state storage device comprising two or more solid-state storage elements, each solid-state storage element partitioned into a plurality of pages, the operations comprising: 235 Added by DJM 3 2021 3/16/21, 12:00 AM
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Delete 		2380.2.01 Claim 17.The solid-state storage device of claim 10, wherein each solid-state storage element comprises a plurality of erase blocks, and wherein the ECC generator is configured to generate a plurality of ECC blocks configured to divide evenly within the erase blocks. 234 Added by DJM 3 2021 3/16/21, 12:00 AM
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Delete 		2380.2.01 Claim 16.The solid-state storage device of claim 10, wherein the write data pipeline comprises a packetizer configured to packetize the received data into one or more packets, wherein the ECC block comprises at least a portion of at least one of the packets, and the ECC block having no fixed relationship between a size of the packets and a size of the ECC block. 233 Added by DJM 3 2021 3/16/21, 12:00 AM
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Delete 		2380.2.01 Claim 19.The computer program product of claim 18, wherein the first portion of the ECC block comprises a portion of the one or more packets and the second portion of the ECC block comprises the error-correcting code capable of correcting an error in the portion of the one or more packets. 239 Added by DJM 3 2021 3/16/21, 12:00 AM
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Delete 		2380.2.01 Claim 14.The solid-state storage device of claim 10, wherein a length of the error-correcting code is predetermined to correct a particular number of bit errors in the ECC block and the length of the error-correcting code is predetermined independent of a block size of the received data. 231 Added by DJM 3 2021 3/16/21, 12:00 AM
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Delete 		2380.2.01 Claim 13.The solid-state storage device of claim 10, wherein the first portion of the ECC block comprises a portion of the received data and the second portion of the ECC block comprises the error-correcting code capable of correcting an error in the portion of the received data. 230 Added by DJM 3 2021 3/16/21, 12:00 AM
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Delete 		2380.2.01 Claim 12.The solid-state storage device of claim 10, wherein the write data pipeline accesses the first and the second solid-state storage elements in parallel via a bus. 229 Added by DJM 3 2021 3/16/21, 12:00 AM
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Delete 		2380.2.01 Claim 11.The solid-state storage device of claim 10, wherein the first portion and the second portion are stored on the first and the second solid-state storage elements responsive to a single solid-state storage element page programming command. 228 Added by DJM 3 2021 3/16/21, 12:00 AM
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Delete 		2380.2.01 wherein the write data pipeline is configured to store a first portion of the ECC block on a page of a first one of the solid-state storage elements and a second portion of the ECC block on a page of a second one of the solid-state storage elements. 227 Added by DJM 3 2021 3/16/21, 12:00 AM
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Delete 		2380.2.01 an error-correcting code (ECC) generator configured to generate an ECC block comprising at least a portion of the received data and an error-correcting code capable of correcting an error in the ECC block; 226 Added by DJM 3 2021 3/16/21, 12:00 AM
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Delete 		2380.2.01 a write data pipeline configured to receive data to be stored on the solid-state storage device, the write data pipeline communicatively coupled to the two or more solid-state storage elements, the write data pipeline comprising, 225 Added by DJM 3 2021 3/16/21, 12:00 AM
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Delete 		2380.2.01 Claim 10.A solid-state storage device comprising two or more solid-state storage elements, each partitioned into a plurality of pages, comprising: 224 Added by DJM 3 2021 3/16/21, 12:00 AM
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Delete 		2380.2.01 Claim 9.The method of claim 1, wherein each solid-state storage element comprises a plurality of erase blocks, the method further comprising generating a plurality of ECC blocks, wherein the ECC blocks divide evenly within the erase blocks. 223 Added by DJM 3 2021 3/16/21, 12:00 AM

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