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Searching terms across all applications.

Id Matter Term Definition Doc No Modified Actions
607 source node FSP1719 4/24/20, 7:22 AM Edit
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610 source storage manager FSP1692 4/24/20, 7:22 AM Edit
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615 spike pulse FSP1751 4/24/20, 7:22 AM Edit
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651 subsequent word line FSP1655 4/24/20, 7:22 AM Edit
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655 symmetric key FSP1719 4/24/20, 7:22 AM Edit
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666 term FSP1689 4/24/20, 7:22 AM Edit
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690 unselected word line FSP1751 4/24/20, 7:22 AM Edit
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692 Placeholder App unstructured data
"Unstructured data" refers to data stored without a particular organization, predefined format, protocol, or configuration.  Examples of unstructured data include, but are not limited to, content of a text message, content of an email message, text content of a file, content of a document, and the like. "Unstructured data" refers to data stored without a particular organization, predefined format, protocol, or configuration.  Examples of unstructured data include, but are not limited to, content of a text message, content of an email message, text content of a file, content of a document, and the like.
FSP1691 4/24/20, 7:22 AM Add Term Edit
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696 user device FSP1691 4/24/20, 7:22 AM Edit
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703 verification data pattern FSP1719 4/24/20, 7:22 AM Edit
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714 wired power supply FSP1484 4/24/20, 7:22 AM Edit
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715 wireless communication channel FSP1484 4/24/20, 7:22 AM Edit
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729 zone FSP1751 4/24/20, 7:22 AM Edit
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266 Free metablock pool FSP1782 4/24/20, 6:54 AM Edit
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733 trigger boosting circuit
"Trigger boosting circuit" refers to a device, component, element, module, system, sub-system, circuitry, logic, hardware, or circuit configured to complement a trigger circuit and mitigate electrical load and/or stress on an IO pad during an ESD event. "Trigger boosting circuit" refers to a device, component, element, module, system, sub-system, circuitry, logic, hardware, or circuit configured to complement a trigger circuit and mitigate electrical load and/or stress on an IO pad during an ESD event.
FSP1777 4/18/20, 2:33 PM Edit
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734 ESD event
"ESD event" refers to a sudden discharge of charge from a charge carrier into an electrical circuit.  "ESD event" refers to a sudden discharge of charge from a charge carrier into an electrical circuit. 
FSP1777 4/18/20, 2:33 PM Edit
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735 second gate node
"Second gate node" refers to a node of an electronic circuit that connects to a gate terminal of a second NMOS transistor in a cascoded configuration connected between a first NMOS transistor and a ground source. "Second gate node" refers to a node of an electronic circuit that connects to a gate terminal of a second NMOS transistor in a cascoded configuration connected between a first NMOS transistor and a ground source.
FSP1777 4/18/20, 2:33 PM Edit
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738 time constant
"Time constant" refers to a constant value used in a circuit that includes a resistor and a capacitor connected in series, either in a charging configuration with a voltage or potential source or in a discharging configuration with a ground source or load discharging the capacitor. A time constant is a value in seconds equal to a resistance for the resistor multiplied by a capacitance for the capacitor. A time constant may be represented by the Greek letter Tau. If a target time constant is known, then an amount of resistance and/or an amount of capacitance for the resistor and capacitor may be adjusted to satisfy other design criteria for a circuit. "Time constant" refers to a constant value used in a circuit that includes a resistor and a capacitor connected in series, either in a charging configuration with a voltage or potential source or in a discharging configuration with a ground source or load discharging the capacitor. A time constant is a value in seconds equal to a resistance for the resistor multiplied by a capacitance for the capacitor. A time constant may be represented by the Greek letter Tau. If a target time constant is known, then an amount of resistance and/or an amount of capacitance for the resistor and capacitor may be adjusted to satisfy other design criteria for a circuit.
FSP1777 4/18/20, 2:33 PM Edit
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754 holding voltage
"Holding voltage" refers to a voltage level at which a node or signal line within a circuit may be held by the operation of included, or additional, protective circuitry in order to prevent the node or signal line from experiencing a voltage that would be harmful to components connected to that node or signal line. "Holding voltage" refers to a voltage level at which a node or signal line within a circuit may be held by the operation of included, or additional, protective circuitry in order to prevent the node or signal line from experiencing a voltage that would be harmful to components connected to that node or signal line.
FSP1777 4/18/20, 2:33 PM Edit
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753 fail-safe voltage threshold
"Fail-safe voltage threshold" refers to a voltage level representing a maximum voltage level that a circuit, such as a communication bus, coupled to an IO pad may experience during normal operation of an electronic device. A circuit supports fail-safe operation if the circuit is configured to remain passive and not interfere with a coupled circuit, such as a communication bus, when a supply voltage for the fail-safe circuit is substantially zero volts. "Fail-safe voltage threshold" refers to a voltage level representing a maximum voltage level that a circuit, such as a communication bus, coupled to an IO pad may experience during normal operation of an electronic device. A circuit supports fail-safe operation if the circuit is configured to remain passive and not interfere with a coupled circuit, such as a communication bus, when a supply voltage for the fail-safe circuit is substantially zero volts.
FSP1777 4/18/20, 2:33 PM Edit
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