any suitable technology that can implement a temperature sensor, including technology currently employed in conventional memory die temperature sensors. Also, it should be noted that while the temperature sensor may be located in the memory die in this embodiment, the temperature sensor may be located in another component in the storage system, such as the controller, or can be a separate component in the storage system. … more any suitable technology that can implement a temperature sensor, including technology currently employed in conventional memory die temperature sensors. Also, it should be noted that while the temperature sensor may be located in the memory die in this embodiment, the temperature sensor may be located in another component in the storage system, such as the controller, or can be a separate component in the storage system.

a device, component, circuit, system, chip, or circuitry configured to detect, sense, and/or measure a temperature of a thing, an apparatus, a circuit, a component, and/or the like. … more a device, component, circuit, system, chip, or circuitry configured to detect, sense, and/or measure a temperature of a thing, an apparatus, a circuit, a component, and/or the like.

a device, component, circuit, system, logic, chip, or circuitry configured to detect, sense, and/or measure a temperature of an object, an apparatus, a circuit, a component, ambient air, and/or the like. One example of a temperature sensor is a semiconductor based temperature sensor which may be fabricated together with the semiconductor. … more a device, component, circuit, system, logic, chip, or circuitry configured to detect, sense, and/or measure a temperature of an object, an apparatus, a circuit, a component, ambient air, and/or the like. One example of a temperature sensor is a semiconductor based temperature sensor which may be fabricated together with the semiconductor.

a control signal, used with synchronous digital circuits, configured to oscillate between a high state and a low state at a particular rate or frequency, measured in clock cycles, for a communication interface. Common clock signals operate such that the signal forms a square wave with a 50% duty cycle. Electronic components rely on a clock signal operating at a constant, fixed frequency. Circuits using a clock signal for synchronization may become active at either the rising edge, falling edge, or, in the case of double data rate, both in the rising and in the falling edges of the clock cycle. (Search 'clock signal' on Wikipedia.com Nov. 11, 2019. Modified. Accessed Feb. 20, 2020.) … more a control signal, used with synchronous digital circuits, configured to oscillate between a high state and a low state at a particular rate or frequency, measured in clock cycles, for a communication interface. Common clock signals operate such that the signal forms a square wave with a 50% duty cycle. Electronic components rely on a clock signal operating at a constant, fixed frequency. Circuits using a clock signal for synchronization may become active at either the rising edge, falling edge, or, in the case of double data rate, both in the rising and in the falling edges of the clock cycle. (Search 'clock signal' on Wikipedia.com Nov. 11, 2019. Modified. Accessed Feb. 20, 2020.)

"Signal" refers to an electrical signal (wired or wireless) sent from one component, circuit, driver, device, manager, or controller to another component, circuit, sub-circuit, driver, device, manager, or controller. In one embodiment, the signal comprises an analog signal. In another embodiment, the signal comprises a digital signal. … more "Signal" refers to an electrical signal (wired or wireless) sent from one component, circuit, driver, device, manager, or controller to another component, circuit, sub-circuit, driver, device, manager, or controller. In one embodiment, the signal comprises an analog signal. In another embodiment, the signal comprises a digital signal.

"XOR parity data" refers to a particular type of parity data. Parity data refers to one or more bits associated with a string of binary code (set of ordered binary bits). Parity bits, and parity data, may be used as the simplest form of error detecting code. Parity bits, and parity data, may generally be applied to the smallest units of a communication protocol or data being exchanged, typically 8-bit octets (a byte), although parity data can also be applied separately to an entire message string of bits or set of data. (Search "parity bit" on Wikipedia.com May 9, 2020. Modified. Accessed May 20, 2020.)XOR parity data is a particular type of parity data that may be used to leverage a property of an XOR operation in which an XOR operation is its own inverse. XOR parity data may be combined for multiple sets of commonly configured data to enable error correction of the data through a reverse XOR operation. This combining is referred to herein as accumulating XOR parity data (e.g., accumulating XOR parity data).In certain embodiments, XOR parity data may comprise an XOR result from a bitwise XOR operation of a string of binary data being protected and another XOR result or an initial parity data set, such as a set of zeros. XOR parity data may also be used with the XOR binary function to recover a set of data, provided a copy of each data set used to generate an XOR parity data result is available except for the data set being recovered. … more "XOR parity data" refers to a particular type of parity data. Parity data refers to one or more bits associated with a string of binary code (set of ordered binary bits). Parity bits, and parity data, may be used as the simplest form of error detecting code. Parity bits, and parity data, may generally be applied to the smallest units of a communication protocol or data being exchanged, typically 8-bit octets (a byte), although parity data can also be applied separately to an entire message string of bits or set of data. (Search "parity bit" on Wikipedia.com May 9, 2020. Modified. Accessed May 20, 2020.)XOR parity data is a particular type of parity data that may be used to leverage a property of an XOR operation in which an XOR operation is its own inverse. XOR parity data may be combined for multiple sets of commonly configured data to enable error correction of the data through a reverse XOR operation. This combining is referred to herein as accumulating XOR parity data (e.g., accumulating XOR parity data).In certain embodiments, XOR parity data may comprise an XOR result from a bitwise XOR operation of a string of binary data being protected and another XOR result or an initial parity data set, such as a set of zeros. XOR parity data may also be used with the XOR binary function to recover a set of data, provided a copy of each data set used to generate an XOR parity data result is available except for the data set being recovered.

"Printed circuit board" or “PCB” refers to a structure that mechanically supports and electrically connects electrical or electronic components using conductive tracks, traces, pads, and other features etched from one or more sheet layers of copper laminated onto and/or between sheet layers of a non-conductive substrate. Components may be soldered onto the PCB to both electrically connect and mechanically fasten them to it. PCBs can be single-sided (one copper layer), double-sided (two copper layers on both sides of one substrate layer), or multi-layer (outer and inner layers of copper, alternating with layers of substrate). Multi-layer PCBs allow for higher component density, because circuit traces on the inner layers free up surface space between components. Multilayer PCBs may include two, three, four, or more copper planes (layers for traces). (Search "printed circuit board" on Wikipedia.com May 22, 2020. Modified. Accessed June 4, 2020.) … more "Printed circuit board" or “PCB” refers to a structure that mechanically supports and electrically connects electrical or electronic components using conductive tracks, traces, pads, and other features etched from one or more sheet layers of copper laminated onto and/or between sheet layers of a non-conductive substrate. Components may be soldered onto the PCB to both electrically connect and mechanically fasten them to it. PCBs can be single-sided (one copper layer), double-sided (two copper layers on both sides of one substrate layer), or multi-layer (outer and inner layers of copper, alternating with layers of substrate). Multi-layer PCBs allow for higher component density, because circuit traces on the inner layers free up surface space between components. Multilayer PCBs may include two, three, four, or more copper planes (layers for traces). (Search "printed circuit board" on Wikipedia.com May 22, 2020. Modified. Accessed June 4, 2020.)

"Parity section" refers to one part of a storage block. A parity section stores XOR parity data for a set of parity bins that enable a data recovery process for one, or both of, physical pages within a logical page of the storage block and one or more logical pages of the storage block.In one embodiment, a parity section includes one or more parity rows. In a storage block that stores a single bit per memory cell, the storage block may include a single parity row. In a storage block that stores a multiple bits per memory cell (e.g., MLC, TLC, QLC, PLC), the storage block may include a parity row associated with each level of bits stored within the memory cells. For example, three parity rows for storage blocks storing three bits per cells. Four parity rows for storage blocks storing four bits per cells. … more "Parity section" refers to one part of a storage block. A parity section stores XOR parity data for a set of parity bins that enable a data recovery process for one, or both of, physical pages within a logical page of the storage block and one or more logical pages of the storage block.In one embodiment, a parity section includes one or more parity rows. In a storage block that stores a single bit per memory cell, the storage block may include a single parity row. In a storage block that stores a multiple bits per memory cell (e.g., MLC, TLC, QLC, PLC), the storage block may include a parity row associated with each level of bits stored within the memory cells. For example, three parity rows for storage blocks storing three bits per cells. Four parity rows for storage blocks storing four bits per cells.

“Intellectual Property” means all of the following, whether protected, created or arising under the Laws of the United States or any foreign jurisdiction: (i) all inventions (whether patentable or unpatentable and whether or not reduced to practice), patent disclosures, industrial designs, all improvements thereto, and all United States and foreign patents, patent applications (including all patents issuing thereon), statutory invention registrations and invention disclosures, together with all continuation applications of all types, including reissuances, restorations, divisions, continuations, continuations-in-part, revisions, extensions and re-examinations thereof, and all rights therein provided by international treaties or conventions; (ii) all United States and non U.S. copyrightable works (including copyrights in Software), design rights, database rights, all copyrights and applications, registrations and renewals in connection therewith, whether registered or unregistered; (iii) trade secrets, know-how and information that is proprietary and confidential; and (iv) all mask works (as defined in 17 U.S. C. §901) and all applications, registrations and renewals in connection therewith; all United States and foreign trademarks, service marks, trade dress, logos, trade names, Internet domain names, moral rights, designs, slogans and corporate names and general intangibles of like nature, whether registered or unregistered, together with all translations, adaptations, derivations and combinations thereof and other identifiers of source and including all goodwill associated therewith and all rights therein provided by international treaties or conventions, common law rights, applications, registrations, pending registrations, applications to register, reissues, extensions of the foregoing and renewals in connection therewith. … more “Intellectual Property” means all of the following, whether protected, created or arising under the Laws of the United States or any foreign jurisdiction: (i) all inventions (whether patentable or unpatentable and whether or not reduced to practice), patent disclosures, industrial designs, all improvements thereto, and all United States and foreign patents, patent applications (including all patents issuing thereon), statutory invention registrations and invention disclosures, together with all continuation applications of all types, including reissuances, restorations, divisions, continuations, continuations-in-part, revisions, extensions and re-examinations thereof, and all rights therein provided by international treaties or conventions; (ii) all United States and non U.S. copyrightable works (including copyrights in Software), design rights, database rights, all copyrights and applications, registrations and renewals in connection therewith, whether registered or unregistered; (iii) trade secrets, know-how and information that is proprietary and confidential; and (iv) all mask works (as defined in 17 U.S. C. §901) and all applications, registrations and renewals in connection therewith; all United States and foreign trademarks, service marks, trade dress, logos, trade names, Internet domain names, moral rights, designs, slogans and corporate names and general intangibles of like nature, whether registered or unregistered, together with all translations, adaptations, derivations and combinations thereof and other identifiers of source and including all goodwill associated therewith and all rights therein provided by international treaties or conventions, common law rights, applications, registrations, pending registrations, applications to register, reissues, extensions of the foregoing and renewals in connection therewith.

“Register” refers to a temporary storage location used to store an address, or a data value, used in a computing operation by a processor, circuit, or logic. Certain registers may be named based on a type of data the register normally stores such as an address register that stores addresses or a data register that stores data or an operand register that stores values used in a firmware instruction. A register may be implemented with logic gates, flip-flops, SRAM, or the like. … more “Register” refers to a temporary storage location used to store an address, or a data value, used in a computing operation by a processor, circuit, or logic. Certain registers may be named based on a type of data the register normally stores such as an address register that stores addresses or a data register that stores data or an operand register that stores values used in a firmware instruction. A register may be implemented with logic gates, flip-flops, SRAM, or the like.

"Power Supply refers to a source of electrical energy for one or more electrical circuits connected to the power supply. … more "Power Supply refers to a source of electrical energy for one or more electrical circuits connected to the power supply.

"Pulse" refers to an analog signal that rises quickly and then falls within a relatively short duration. In certain embodiments, a pulse may comprise a short voltage level increase that rises quickly to a peak level and then quickly falls. … more "Pulse" refers to an analog signal that rises quickly and then falls within a relatively short duration. In certain embodiments, a pulse may comprise a short voltage level increase that rises quickly to a peak level and then quickly falls.

"Threshold" refers to a level, point, or value above which a condition is true or will take place and below which the condition is not true or will not take place, or vice versa. (Search "threshold" on Merriam-Webster.com. Merriam-Webster, 2019. Web. 14 Nov. 2019. Modified.) … more "Threshold" refers to a level, point, or value above which a condition is true or will take place and below which the condition is not true or will not take place, or vice versa. (Search "threshold" on Merriam-Webster.com. Merriam-Webster, 2019. Web. 14 Nov. 2019. Modified.)

A circuit, as used herein, comprises a set of one or more electrical and/or electronic components providing one or more pathways for electrical current. In certain embodiments, a circuit may include a return pathway for electrical current, so that the circuit is a closed loop. In another embodiment, however, a set of components that does not include a return pathway for electrical current may be referred to as a circuit (e.g., an open loop). For example, an integrated circuit may be referred to as a circuit regardless of whether the integrated circuit is coupled to ground (as a return pathway for electrical current) or not. In various embodiments, a circuit may include a portion of an integrated circuit, an integrated circuit, a set of integrated circuits, a set of non-integrated electrical and/or electrical components with or without integrated circuit devices, or the like. In one embodiment, a circuit may include custom VLSI circuits, gate arrays, logic circuits, or other integrated circuits; off-the-shelf semiconductors such as logic chips, transistors, or other discrete devices; and/or other mechanical or electrical devices. A circuit may also be implemented as a synthesized circuit in a programmable hardware device such as field programmable gate array, programmable array logic, programmable logic device, or the like (e.g., as firmware, a netlist, or the like). A circuit may comprise one or more silicon integrated circuit devices (e.g., chips, die, die planes, packages) or other discrete electrical devices, in electrical communication with one or more other components through electrical lines of a printed circuit board (PCB) or the like. Each of the modules described herein, in certain embodiments, may be embodied by or implemented as a circuit. … more A circuit, as used herein, comprises a set of one or more electrical and/or electronic components providing one or more pathways for electrical current. In certain embodiments, a circuit may include a return pathway for electrical current, so that the circuit is a closed loop. In another embodiment, however, a set of components that does not include a return pathway for electrical current may be referred to as a circuit (e.g., an open loop). For example, an integrated circuit may be referred to as a circuit regardless of whether the integrated circuit is coupled to ground (as a return pathway for electrical current) or not. In various embodiments, a circuit may include a portion of an integrated circuit, an integrated circuit, a set of integrated circuits, a set of non-integrated electrical and/or electrical components with or without integrated circuit devices, or the like. In one embodiment, a circuit may include custom VLSI circuits, gate arrays, logic circuits, or other integrated circuits; off-the-shelf semiconductors such as logic chips, transistors, or other discrete devices; and/or other mechanical or electrical devices. A circuit may also be implemented as a synthesized circuit in a programmable hardware device such as field programmable gate array, programmable array logic, programmable logic device, or the like (e.g., as firmware, a netlist, or the like). A circuit may comprise one or more silicon integrated circuit devices (e.g., chips, die, die planes, packages) or other discrete electrical devices, in electrical communication with one or more other components through electrical lines of a printed circuit board (PCB) or the like. Each of the modules described herein, in certain embodiments, may be embodied by or implemented as a circuit.

As used herein, "metadata" refers to data that describes, represents or is associated with other data. Examples of metadata includes, but is not limited to, error correction code data, parity data, parity bits, redundancy data, parameter settings, and the like. In one embodiment, metadata refers to system data usable to facilitate operation of non-volatile storage device. Metadata stands in contrast to, for example, data produced by an application (i.e., application data) or forms of data that would be considered by an operating system as user data. For example, a zone or a logical erase block may include metadata specifying, without limitation, usage statistics (e.g., the number of program erase cycles performed on that zone or logical erase block, health statistics (e.g., a value indicative of how often corrupted data has been read from that zone or logical erase block), security or access control parameters, sequence information (e.g., a sequence indicator), a persistent metadata flag (e.g., indicating inclusion in an atomic storage operation), a transaction identifier, or the like. … more As used herein, "metadata" refers to data that describes, represents or is associated with other data. Examples of metadata includes, but is not limited to, error correction code data, parity data, parity bits, redundancy data, parameter settings, and the like. In one embodiment, metadata refers to system data usable to facilitate operation of non-volatile storage device. Metadata stands in contrast to, for example, data produced by an application (i.e., application data) or forms of data that would be considered by an operating system as user data. For example, a zone or a logical erase block may include metadata specifying, without limitation, usage statistics (e.g., the number of program erase cycles performed on that zone or logical erase block, health statistics (e.g., a value indicative of how often corrupted data has been read from that zone or logical erase block), security or access control parameters, sequence information (e.g., a sequence indicator), a persistent metadata flag (e.g., indicating inclusion in an atomic storage operation), a transaction identifier, or the like.

As used herein, "attribute" refers to any property, trait, aspect, quality, data value, setting, or feature of an object or thing. In embodiments of the claimed solution, attribute refers to properties of an object detector and may include, but is not limited to, an accuracy level for the object detector, a latency for the object detector between receiving input(s) and providing an output (e.g., an inference result, an object detection prediction), a measure of an amount of memory resources the object detector uses, a measure of a resolution level for an image or frame provided as input to the object detector, a measure of an amount of processor resources the object detector uses, a measure of the number of computations the object detector performs per unit of time, such as seconds, and the like. Where the object detector comprises a neural network, the attribute(s) of the object detector may include, but are not limited to, a type of neural network, a number of layers of the neural network, a number of nodes of the neural network, a number and/or type of interconnection between nodes of the neural network, a number of parameters used in the neural network, a number of floating point operations per second (FLOPS) for the neural network, and the like. Where the object detector comprises a neural network, object detectors may be compared based on attributes for each object detector. In certain embodiments, object detectors in the form of neural networks may be compared, at a high level, using a rough comparison reference to size or weight. Generally, these size or weight comparisons of neural networks may be used to compare the neural networks based on a collection of attributes that relate to tradeoffs between one or more performance metrics and one or more operational constraints. For example, an object detector/neural network may be described as heavy, heavyweight, large, thick, or fat and have the attributes of having a relatively high number of nodes, high number of layers, high FLOPS, high memory usage, and/or high computational latency, in exchange for higher accuracy of object detection. In contrast and by comparison, another object detector/neural network may be described as light, lightweight, small, thin, or lean and have the attributes of having a relatively small/low number of nodes, small/low number of layers, small/low FLOPS, small/low memory usage, and/or small/low computational latency, in exchange for lower accuracy of object detection. Where the object detector comprises a neural network, and a convolutional neural network in particular, the attribute(s) may also be referred to as hyperparameters and may include aspects such as a number of total layers to use in the neural network, a number of convolution layers, filter sizes, values for strides at each layer, and/or the like. … more As used herein, "attribute" refers to any property, trait, aspect, quality, data value, setting, or feature of an object or thing. In embodiments of the claimed solution, attribute refers to properties of an object detector and may include, but is not limited to, an accuracy level for the object detector, a latency for the object detector between receiving input(s) and providing an output (e.g., an inference result, an object detection prediction), a measure of an amount of memory resources the object detector uses, a measure of a resolution level for an image or frame provided as input to the object detector, a measure of an amount of processor resources the object detector uses, a measure of the number of computations the object detector performs per unit of time, such as seconds, and the like. Where the object detector comprises a neural network, the attribute(s) of the object detector may include, but are not limited to, a type of neural network, a number of layers of the neural network, a number of nodes of the neural network, a number and/or type of interconnection between nodes of the neural network, a number of parameters used in the neural network, a number of floating point operations per second (FLOPS) for the neural network, and the like. Where the object detector comprises a neural network, object detectors may be compared based on attributes for each object detector. In certain embodiments, object detectors in the form of neural networks may be compared, at a high level, using a rough comparison reference to size or weight. Generally, these size or weight comparisons of neural networks may be used to compare the neural networks based on a collection of attributes that relate to tradeoffs between one or more performance metrics and one or more operational constraints. For example, an object detector/neural network may be described as heavy, heavyweight, large, thick, or fat and have the attributes of having a relatively high number of nodes, high number of layers, high FLOPS, high memory usage, and/or high computational latency, in exchange for higher accuracy of object detection. In contrast and by comparison, another object detector/neural network may be described as light, lightweight, small, thin, or lean and have the attributes of having a relatively small/low number of nodes, small/low number of layers, small/low FLOPS, small/low memory usage, and/or small/low computational latency, in exchange for lower accuracy of object detection. Where the object detector comprises a neural network, and a convolutional neural network in particular, the attribute(s) may also be referred to as hyperparameters and may include aspects such as a number of total layers to use in the neural network, a number of convolution layers, filter sizes, values for strides at each layer, and/or the like.

"Combined XOR parity data" refers to an XOR parity data calculation that combines XOR parity data from two sets of data. In one example, data in one storage block of nonvolatile memory is combined using, for example, a bitwise exclusive or (e.g., XOR) operation, with data in a second storage block. The output of the bitwise XOR operation is combined XOR parity data. As needed, the output of the bitwise XOR operation can be combined with another set of data from a storage block to create a new set of combined XOR parity data. Based on a number of storage blocks for which XOR parity data is to be combined into combined XOR parity data, a process of successive bitwise XOR operations (termed accumulating XOR parity data) may be performed on the data of each storage block in order to generate combined XOR parity data.Thus, in one embodiment, XOR parity data from one open storage block of nonvolatile memory may be combined with XOR parity data from another, or each of a plurality of storage blocks, of nonvolatile memory to generate combined XOR parity data. … more "Combined XOR parity data" refers to an XOR parity data calculation that combines XOR parity data from two sets of data. In one example, data in one storage block of nonvolatile memory is combined using, for example, a bitwise exclusive or (e.g., XOR) operation, with data in a second storage block. The output of the bitwise XOR operation is combined XOR parity data. As needed, the output of the bitwise XOR operation can be combined with another set of data from a storage block to create a new set of combined XOR parity data. Based on a number of storage blocks for which XOR parity data is to be combined into combined XOR parity data, a process of successive bitwise XOR operations (termed accumulating XOR parity data) may be performed on the data of each storage block in order to generate combined XOR parity data.Thus, in one embodiment, XOR parity data from one open storage block of nonvolatile memory may be combined with XOR parity data from another, or each of a plurality of storage blocks, of nonvolatile memory to generate combined XOR parity data.

"Data section" refers to one part of a storage block. A data section stores data blocks within the storage block. The data block may include XOR parity data in addition to any XOR parity data stored in a parity section associated with the data section. For example, the data block may store one or more codewords that include data and error correction code data (another form of XOR parity data) that protects the data of the codeword.The data section may be organized in a variety of ways in different embodiments. In certain embodiments, the data section includes a plurality of logical pages each made up of physical pages that span planes and memory die of a non-volatile memory array. … more "Data section" refers to one part of a storage block. A data section stores data blocks within the storage block. The data block may include XOR parity data in addition to any XOR parity data stored in a parity section associated with the data section. For example, the data block may store one or more codewords that include data and error correction code data (another form of XOR parity data) that protects the data of the codeword.The data section may be organized in a variety of ways in different embodiments. In certain embodiments, the data section includes a plurality of logical pages each made up of physical pages that span planes and memory die of a non-volatile memory array.

"Fill data" refers to one or more data blocks that comprise valid data and are used to replace invalid data within a storage block, such as a fragmented source storage block. Relocating fill data may include updating a physical block address associated with the logical block address for the data block that includes the fill data. … more "Fill data" refers to one or more data blocks that comprise valid data and are used to replace invalid data within a storage block, such as a fragmented source storage block. Relocating fill data may include updating a physical block address associated with the logical block address for the data block that includes the fill data.