Term #1,404
wafer bump
Claim Term
wafer bump
Origin matter
Electrical Interconnection of Image Sensor package
Reference Case 1
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Date Added
2/24/21
Created
2/24/21, 3:33 PM
Modified
2/24/21, 3:44 PM
Full Desc
"Wafer bump" or "Bump" as used herein refers to a structure of an electronic circuit within a semiconductor or integrated circuit (IC) or packaging for a semiconductor or IC configured to enable the electronic circuit to couple or connect to another electronic circuit that is either internal to or external to the semiconductor or IC or packaging. A plurality of wafer bumps may be formed on a semiconductor wafer or substrate using one or more process steps such that the bumps are formed in a batch process. A wafer bump may connect to an IO pad using one or more layers of Under Bump Metallization (UBM). A wafer bump may be of two types a solder bump where a coarse pitch of greater than 150 micrometers is called for or a copper pillar where a fine pitch of less than 150 micrometers is called for. A solder bump may include a metal alloy of tin and/or lead combined with another conductive metal. A copper pillar may include a copper pillar with a solder ball formed on top of the pillar. A wafer bump may have a variety of physical forms including a ball shape, an oval cross-section or the like.
Applications using this term
| Matter | Usage | Notes | Actions |
|---|---|---|---|
| ONSO3305US - Onsemi346 | Defined | — | App terms |