Term #1,282
page buffer
Claim Term
page buffer
Origin matter
—
Reference Case 1
FSP1830
Date Added
6/24/20
Created
6/24/20, 9:17 PM
Modified
6/24/20, 9:17 PM
Full Desc
"Page buffer" refers to any circuit, sub-circuit, electronic component, hardware, software, firmware, module, logic, memory, volatile memory, device, or apparatus configured, programmed, designed, arranged, or engineered to temporarily store a data value.In one embodiment, a non-volatile memory array includes one or more page buffers implemented as latches, electronic circuits, that store a data value sensed by sense amplifiers coupled to bit lines of the non-volatile memory array. In certain embodiments, a page buffer may include a latch for each bit line along a row ( a physical page or logical page) such that the memory cells of a physical page or logical page are sensed/read into the page buffer in a single read/sense operation for the memory die.For a non-volatile memory array having memory cells configured to store more than one bit per memory cell, the non-volatile memory array may include a separate page buffer for each bit that the memory cells are storing. (e.g., a QLC non-volatile memory array may include four page buffers).