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parity bin map
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2380.2.01
US-20150012794-A1
US-20150205664-A1
US-20100023800-A1
US-8737141-A1
US-10157004-B2
US10007433A1
US-9159419-B2
US-10114589-A1
US-10134728-A1
US-20200065270-A1
US-10637533-B2
US-9927986-A1
US-8380915-A1
US-9159419-A1
US-9208071-A1
US-20200098728-A1
US-10643676-A1
US-10468073-B2
US-10283200-A1
US-10461965-B1
US-20130279232-A1
US-8892980-B2
US9632727A1
US10558561A1
US20100023800A1
US7230213A1
OPT-9
FLO-2
FLO-5PROV
ONSO3175(B) - Onsemi378
ONSO3305US - Onsemi346
GTS-3DES
FLO-4
US8762658B2
US8533406B2
US9632727B2
KMN-1PROV
PAT-2
PER-8 PROV
PER-9 PROV
INS-4PROV
HAR-1
CES-16
NXT-5PROV NXT-5, 6, 7, 8
IPP-0051-US14 cross roads
FLO-7PROV
IMI-5PROV
IPP-0050-US35 nextremity
VIL-12
OPT-13
TOY-1
US10998041B1
FSP1845
US6559866B2
Placeholder App
PER-10
KBR-1 1400.2.623
PER-13PROV
PAT-3
US20030023453
RMS-1DES
SMG-1DES
FLO-5
US10318495
US10133662B2
PER-11
US20140066758
VIL-17
PER-17
JBR-1
PER-12
US11056880
US11302645
US20210407565
US11081191
PON-1PROV, 2PROV, 3PROV
PER-33
RMT-1PROV
PER-32
PER-34
MCC-1
FLO-10
PER-14
PER-19
PER-22
PER-18
PER-24
TMC-PAT-1
DAR-2
PER-23
TMC-PAT-4
PER-16
PER-4 DIV1
PER-20
PER-21
BRT-PAT-1
TMC-PAT-5
TMC-PAT-6PROV
BRT-PAT-2-PROV
71212.157.USU1
FPR-PAT-1-PROV
71212.158.USP1
RMT-1
DAR-1PROV
DAR-2PROV
PON-1PROV
PON-2PROV
PON-3PROV
PER-18PROV
TMC-1PROV
TMC-2PROV
PER-13PCT
PER-13
PER-16PROV
PER-14PROV
PER-34PROV
TMC-4PROV
TMC-3
PAS-1PROV
VEH-1
PER-29DES
TEST.001
E2E-TEST.001
TEST-001
TEST-002
TEST-003
TEST-004
ZED006
FSP1011
GAV-PAT-1-PROV
App Docket
Created Date
Full Desc
"Parity bin map" refers to a configuration, design, arrangement, plan, mapping or the like that identifies which physical pages are to be combined in an XOR operation (referred to as accumulating XOR parity data) to generate XOR parity data for an associated parity bin.In certain embodiments, a parity bin map is designed based a physical layout of physical pages, physical planes, and memory die within a non-volatile memory array and accounts for distribution of the physical pages among memory die, memory planes, logical pages across the non-volatile memory array as well as logical pages stored within strings and/or word lines of the non-volatile memory array. In such embodiments, the parity bin map may be organized such that XOR parity data of a parity bin and each physical page used to generate the XOR parity data of the parity bin may be used to recover or re-create certain physical pages of the non-volatile memory array in response to certain errors or faults that may occur in the non-volatile memory array. In particular, the parity bin map may be configured to enable recovery of physical page data for one or more of the most common errors or faults (e.g. Word line to word line shorts, logical page read errors, etc.) In another aspect, XOR parity data may map from physical pages to parity bins among alternating word lines (e.g., logical pages) such that each physical page of a logical page can be recovered if needed, for example in response to a word line to word line short within a single plane.In one embodiment, the parity bin map is implemented based on which physical pages among the rows and columns of a non-volatile memory array are assigned or otherwise associated with a parity bin. In other words, the parity bin map may not be represented in the storage device using a data structure and instead may be a logical construct. In another embodiment, the parity bin map is represented by data structure that associates parity bins with the physical pages, member pages, used in accumulating XOR parity data to generate the XOR parity data of the parity bin.
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