16/146,238

Paragraph Number

74

The controller die 102 and the memory dies 304(1)-304(N) may communicate signals between each other on transmission lines (e.g., at least some of the transmission lines 134 of FIGS. 2A and 2B) connecting the controller die 102 and the memory dies 304(1)-304(N). For simplicity, the physical layout of FIG. 3 shows a single transmission line 308 connecting the controller die 102 and the memory dies 304. However, in actual implementation as described with reference to FIGS. 2A and 2B, there may be multiple transmission lines between the controller 102 and the memory dies 304(1)-304(N) configured to communicate data signals, clock signals, strobe signals, command signals, status signals, or any other type of signals between the controller die 102 and the memory dies 304. The multiple (at least two) transmission lines may be configured in parallel with each other such that two or more signals propagating on two or more parallel transmission lines may be communicated separately and/or simultaneously.

Added by DJM 12 2021