16/146,238
Paragraph Number70
6583
| Application | Dedicated termination dies for memory systems | ||
|---|---|---|---|
| Matter Number | FSP1845 | Reference Case 1 | FSP1845 |
| Created | 12/22/21, 12:00 AM | Modified | 12/22/21, 12:00 AM |
Also, in at least some embodiments, as shown in FIG. 2B, the memory-side interface 156 may include on-die termination (ODT) resistance circuitry 162, which may include one or more resistors or other circuit components (active and/or passive) providing a resistance. The on-die termination resistance circuitry 162 may provide termination resistance or impedance for the transmission lines 134, and may be used for impedance matching between the memory dies 104 and the transmission lines 134. The on-die termination resistance circuitry 162 may be connected to the I/O contact pads 160. In addition, for at least some embodiments, the on-die termination resistance circuitry 162 may provide variable resistance levels or values, including one or more high levels and one or more low levels, as described in further detail below. The resistance levels or values that the on-die termination resistances provide may be controlled by the controller die 102, the on-die control logic 152, or a combination thereof.
Added by DJM 12 2021