Paragraph 67

Paragraph 67

Application: FSP1845

Matter Number FSP1845
Paragraph Number 67
Application Number 16/146,238
Reference Case 1 FSP1845
Reference Case 2
Created 12/22/21, 12:00 AM
Modified 12/22/21, 12:00 AM
Id 6,580
Content
Also, the memory die 104 may include a memory-side memory interface (or just memory-side interface) 156 that is configured to interface and communicate with the controller-side memory interface 130 of the controller die 102. In particular, the memory-side interface 156 may be coupled with the transmission lines 134 of the memory system 100. When a given memory die 104 is to transmit a signal to the controller die 102, the given memory die 104 may transmit the signal via its memory-side interface 156 onto one of the transmission lines 134 to the controller die 102. Additionally, when a given memory die 104 is to receive a signal from the controller die 102, the given memory die 104 may receive the signal via its memory-side interface 156 from one of the transmission lines 134. As described in further detail below, components of the memory-side interface 156, along with die capacitance of the dies may form part of and/or determine characteristics impedances of the transmission lines 134.
Notes Added by DJM 12 2021