Paragraph 65
Paragraph 65
Application
Dedicated termination dies for memory systems
Matter Number
FSP1845
Paragraph Number
65
Application Number
16/146,238
Reference Case 1
FSP1845
Reference Case 2
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Created
12/22/21, 12:00 AM
Modified
12/22/21, 12:00 AM
Id
6,578
Content
The memory die 104 may further include a page buffer or data cache 144 that caches data that is sensed from and/or that is to be programmed to the memory cell structure 142. The memory die 104 may also include a row address decoder 146 and a column address decoder 148. The row address decoder 146 may decode a row address and select a particular wordline in the memory array 142 when reading or writing data to/from the memory cells in the memory array 142. The column address decoder 148 may decode a column address to select a particular group of bitlines in the memory array 142 to be electrically coupled to the data cache 144.
Notes
Added by DJM 12 2021