Paragraph 60
Paragraph 60
Application
Dedicated termination dies for memory systems
Matter Number
FSP1845
Paragraph Number
60
Application Number
16/146,238
Reference Case 1
FSP1845
Reference Case 2
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Created
12/22/21, 12:00 AM
Modified
12/22/21, 12:00 AM
Id
6,573
Content
In a two dimensional memory structure, the semiconductor memory elements are arranged in a single plane or a single memory device level. Typically, in a two dimensional memory structure, memory elements are arranged in a plane (e.g., in an x-z direction plane) which extends substantially parallel to a major surface of a substrate that supports the memory elements. The substrate may be a wafer over or in which the layer of the memory elements are formed or it may be a carrier substrate which is attached to the memory elements after they are formed. As a non-limiting example, the substrate may include a semiconductor such as silicon.
Notes
Added by DJM 12 2021