Paragraph 53

Paragraph 53

Application: FSP1845

Matter Number FSP1845
Paragraph Number 53
Application Number 16/146,238
Reference Case 1 FSP1845
Reference Case 2
Created 12/22/21, 12:00 AM
Modified 12/22/21, 12:00 AM
Id 6,566
Content
Additionally, the memory interface 130 and/or the controller I/O circuitry 136 may be configured to communicate with the memory dies 104 over the transmission lines 134 using any of various transmission modes, types, protocols, standards, or formats, non-limiting examples of which include double data rate (DDR), and/or a Toggle Mode (TM), such as TM 200, 400, or 800.
Notes Added by DJM 12 2021