Paragraph 235
Paragraph 235
Application
Calibrating non-volatile memory read thresholds
Matter Number
US10998041B1
Paragraph Number
235
Application Number
16869424
Reference Case 1
US10998041B1
Reference Case 2
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Created
12/22/21, 12:00 AM
Modified
12/22/21, 12:00 AM
Id
6,475
Content
"Error correction code decoder" refers to any hardware, software, firmware, circuit, component, module, logic, device, or apparatus configured, programmed, designed, arranged, or engineered to detect and/or correct errors in a data set using redundancy information defined for the data set (e.g., a code word). The error correction code decoder, in one embodiment, may comprise one or more types of decoder, including, but not limited to, a low density parity check (LDPC) decoder, a Reed-Solomon code decoder, a Golay code decoder, a Bose Chaudhuri Hocquenghem (BCH) code decoder, a turbo code decoder, a multidimensional parity code decoder, a Hamming code decoder, a Hadamard code decoder, an expander code decoder, a Reed-Muller code decoder, a Viterbi decoder, a Fano decoder, or the like.
Notes
Added by DJM 12 2021