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FIG. 7 depicts an example of correlations between memory states 700 and adjustments to read levels for a set of multi-level storage cells of non-volatile memory media. Those of skill in the art recognize that threshold voltages for memory cells change over time due to various factors, including temperature changes, wearing of the memory cells, disturb influences, leakage, and the like. Generally, such changes are not problematic for a majority of the memory cells within a cell threshold voltage distribution. However, these changes in threshold voltage may result in higher bit error rates due to memory cells near the boundaries of the memory states (such boundaries may be referred to a lower tail for a part of the distribution curve closest to the lowest threshold voltages and an upper tail a part of the distribution curve closest to the higher threshold voltages) moving from having a threshold voltage within one memory state to having a threshold voltage within a neighboring memory state (adjacent memory state).

Added by DJM 12 2021