Paragraph 124
Paragraph 124
Application
Calibrating non-volatile memory read thresholds
Matter Number
US10998041B1
Paragraph Number
124
Application Number
16869424
Reference Case 1
US10998041B1
Reference Case 2
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Created
12/22/21, 12:00 AM
Modified
12/22/21, 12:00 AM
Id
6,364
Content
The threshold voltage for each memory cell may be encoded to represent binary data. In particular, the threshold voltage for each memory cell may be encoded to represent a 2, 3, 4 or more bits per memory cell. For example in FIG. 4, the binary value "1111" may in one embodiment be associated with the lowest memory state (labeled Er, an erased memory state 402), the value "1110" associated with the next lowest read voltage state and first of the QLC programmed memory states 404 (labeled A), the value "1010" associated with the next highest read voltage state (labeled B), and the value "1000" associated with the next highest read voltage state (labeled C), and so on, with only one bit changing between memory states, also referred to as read voltage states.
Notes
Added by DJM 12 2021