Paragraph 118

Paragraph 118

Application: US10998041B1

Matter Number US10998041B1
Paragraph Number 118
Application Number 16869424
Reference Case 1 US10998041B1
Reference Case 2
Created 12/22/21, 12:00 AM
Modified 12/22/21, 12:00 AM
Id 6,358
Content
In FIG. 4, the Vt window may begin at the low end of the erased memory state 402 ("Er") and extend to the upper end/boundary of the "O" memory state. The graph includes erased memory state 402 and memory states "A"-"O" for a total of 16 memory states to represent 4 bits stored in each memory cell. Certain memory states are adjacent memory states. "Adjacent memory state" refers to a memory state that neighbors a given memory state along a range of threshold voltages with no memory states defined between the given memory state and the adjacent memory state. "Er" memory state (erased memory state 402) and "A" memory state are adjacent memory states. Similarly, "A" memory state and "B" memory state are adjacent memory states. "A" memory state and "C" memory state are not adjacent memory states because "B" memory state is between them.
Notes Added by DJM 12 2021