Paragraph 109
Paragraph 109
Application
Calibrating non-volatile memory read thresholds
Matter Number
US10998041B1
Paragraph Number
109
Application Number
16869424
Reference Case 1
US10998041B1
Reference Case 2
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Created
12/22/21, 12:00 AM
Modified
12/22/21, 12:00 AM
Id
6,349
Content
In one embodiment, a physical page represents the smallest storage block within a given die that can be written to at a given time. In one embodiment, a logical page is the smallest writable storage block supported by the storage controller. (in one embodiment, the storage controller may include a buffer configured to store up to a logical page worth of data; upon filling the buffer, the storage controller may write the contents of the buffer to a single logical page simultaneously.) In some instances, dividing a logical page across multiple dies may result in faster access times for a set of data when multiple dies are accessed in parallel. The logical page configurations may be mapped to any physical page on a die, or across a plurality of memory dies, just as with logical erase blocks.
Notes
Added by DJM 12 2021