Paragraph 106
Paragraph 106
Application
Calibrating non-volatile memory read thresholds
Matter Number
US10998041B1
Paragraph Number
106
Application Number
16869424
Reference Case 1
US10998041B1
Reference Case 2
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Created
12/22/21, 12:00 AM
Modified
12/22/21, 12:00 AM
Id
6,346
Content
"Logical erase block" refers to another term for a storage block. In certain embodiments, a logical erase block refers to a set of logical pages that span planes, memory die, and/or chips. This organization of storage cells is deemed `logical` because the physical pages may not be directly coupled to each other. However, the physical pages are operated in parallel as though they are a single page. In like manner, multiple physical erase blocks may be operated in parallel as though they are a single erase block and are thus referred to as logical erase blocks. The terms logical erase block, metablock, and super block are used interchangeably herein.
Notes
Added by DJM 12 2021