16869424
Paragraph Number95
6335
| Application | Calibrating non-volatile memory read thresholds | ||
|---|---|---|---|
| Matter Number | US10998041B1 | Reference Case 1 | US10998041B1 |
| Created | 12/22/21, 12:00 AM | Modified | 12/22/21, 12:00 AM |
"Drain control line" refers to a control line configured to operate a select gate (e.g., turn the select gate on, activate, and off, deactivate) for coupling a drain side of a NAND string to a bit line and/or a sense circuit. "Drain side" refers to the end of a NAND string or side of a three-dimensional memory array connected to the bit line(s). The term comes from the drain terminal of a field effect transistor or similar component. In a daisy-chained string of transistors, the source terminal of the first transistor may be connected to a source line, a ground or some other lower voltage line, and the drain terminal may be connected to the source terminal of the next transistor, that transistor's drain terminal may be connected to the next source terminal and so on, with the drain terminal of the final transistor connected to a higher voltage signal or power line. The gate terminal of each transistor may then control whether or not current flows through the transistor from source to drain, and through the string from source line to bit line.
Added by DJM 12 2021