6329

Application Calibrating non-volatile memory read thresholds
Matter Number US10998041B1 Reference Case 1 US10998041B1
Created 12/22/21, 12:00 AM Modified 12/22/21, 12:00 AM
Application Number

16869424

Paragraph Number

89

Content

The address decoder 216 provides an address interface between that used by the host or a storage controller 102 to the hardware address used by the row decoder 210 and column decoder 212. The power control 218 controls the power and voltages supplied to the various control lines during memory operations. "Control line" refers to a structure, circuit, circuitry, and/or associated logic configured to convey an electrical current and/or voltage from a source to a destination. In certain embodiments, analog voltages, currents, biases, and/or digital signals supplied or discharged over a control line are used to control switches, select gates, and/or other electrical components. Certain control lines may have a specific name based on what parts of a circuit the control line controls or where the control line couples, or connects, to other circuits. Examples of named control lines include word lines, bit lines, source control lines, drain control lines, and the like.

Notes

Added by DJM 12 2021