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Dave's PCF WIP: Paragraphs

6326

Application Calibrating non-volatile memory read thresholds
Matter Number US10998041B1 Reference Case 1 US10998041B1
Created 12/22/21, 12:00 AM Modified 12/22/21, 12:00 AM
Application Number

16869424

Paragraph Number

86

Content

The non-volatile memory array 206 can be two-dimensional (2D--laid out in a single fabrication plane) or three-dimensional (3D--laid out in multiple fabrication planes). The non-volatile memory array 206 may comprise one or more arrays of memory cells including a 3D array. In one embodiment, the non-volatile memory array 206 may comprise a monolithic three-dimensional memory structure (3D array) in which multiple memory levels are formed above (and not in) a single substrate, such as a wafer, with no intervening substrates. The non-volatile memory array 206 may comprise any type of non-volatile memory that is monolithically formed in one or more physical levels of arrays of memory cells having an active area disposed above a silicon substrate. The non-volatile memory array 206 may be in a non-volatile solid-state drive having circuitry associated with the operation of the memory cells, whether the associated circuitry is above or within the substrate.

Notes

Added by DJM 12 2021