Paragraph 78
Paragraph 78
Application
Calibrating non-volatile memory read thresholds
Matter Number
US10998041B1
Paragraph Number
78
Application Number
16869424
Reference Case 1
US10998041B1
Reference Case 2
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Created
12/22/21, 12:00 AM
Modified
12/22/21, 12:00 AM
Id
6,318
Content
A memory array may include a set of memory cells at a number of levels of organization within a storage or memory system. In one embodiment, memory cells within a plane may be organized into a memory array. In one embodiment, memory cells within a plurality of planes of a memory die may be organized into a memory array. In one embodiment, memory cells within a plurality of memory dies of a memory device may be organized into a memory array. In one embodiment, memory cells within a plurality of memory devices of a storage system may be organized into a memory array.
Notes
Added by DJM 12 2021