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Paragraph Number77
6317
| Application | Calibrating non-volatile memory read thresholds | ||
|---|---|---|---|
| Matter Number | US10998041B1 | Reference Case 1 | US10998041B1 |
| Created | 12/22/21, 12:00 AM | Modified | 12/22/21, 12:00 AM |
Application Number
Content
A memory array is addressable using a row identifier and a column identifier. Those of skill in the art recognize that a memory array may comprise the set of memory cells within a plane, the set of memory cells within a memory die, the set of memory cells within a set of planes, the set of memory cells within a set of memory die, the set of memory cells within a memory package, the set of memory cells within a set of memory packages, or with other known memory cell set architectures and configurations.
Notes
Added by DJM 12 2021