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As NAND memory cell storage technologies progress from a single bit per memory cell (single level cell SLC) to multi-level, tri-level, and quad-level operation (storing two, three, and four bits of data, respectively per memory cell), the number of memory states defined within a voltage range (also referred to as a Vt window) increases exponentially. As a non-volatile memory device of memory cells is used, memory states may shift over time to higher threshold voltages or lower threshold voltages. Furthermore, the memory states may spread out widening and overlapping with adjacent memory states. A read scan operation, also referred to as a read level calibration, may be performed both when the non-volatile memory device is manufactured and multiple times thereafter in order to determine suitable voltage thresholds to distinguish memory states from each other and provide accurate read operations.

Added by DJM 12 2021