Paragraph 52

Paragraph 52

Application: US-8380915-A1

Matter Number
Paragraph Number 52
Application Number 13189402
Reference Case 1
Reference Case 2
Created 3/12/21, 12:00 AM
Modified 3/12/21, 12:00 AM
Id 2,625
Content
In one embodiment, at least one solid-state controller 104 includes a field-programmable gate array (“FPGA”) and controller functions are programmed into the FPGA. In a particular embodiment, the FPGA is a Xilinx® FPGA. In another embodiment, the solid-state storage controller 104 comprises components specifically designed as a solid-state storage controller 104, such as an application-specific integrated circuit (“ASIC”) or custom logic solution. Each solid-state storage controller 104 typically includes a write data pipeline 106 and a read data pipeline 108, which are describe further in relation to FIG. 3A. In another embodiment, at least one solid-state storage controller 104 is made up of a combination FPGA, ASIC, and custom logic components. In certain embodiments, at least a portion of a solid-state storage controller 104 is integrated with, part of, and/or in communication with a device driver executing on the computer 112, or the like.
Notes Added by DJM 3 2021