Paragraph 56
Paragraph 56
Matter Number
ONSO3305US - Onsemi346
Paragraph Number
56
Application Number
16455676
Reference Case 1
ONSO3305US - Onsemi346
Reference Case 2
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Created
3/3/21, 12:00 AM
Modified
3/3/21, 12:00 AM
Id
2,520
Content
Referring to FIG. 6, an implementation of a semiconductor wafer 36 is illustrated. The semiconductor wafer 36 has a first side 38 and a second side 40. The semiconductor wafer includes a plurality of active areas 42 on the second side of the semiconductor wafer. As illustrated, two die pads 44 are visible on either side of each of the plurality of active areas. In some implementations, more than two die pads may be positioned around each of the plurality of active areas. The method of forming semiconductor packages includes forming inner bumps on each of the die pads. The inner bumps may include conductive materials, such as by non-limiting example, solder and copper. Referring to FIG. 6, the semiconductor wafer 36 is illustrated after formation of the inner bumps 46 on the die pads 44.
Notes
Added by DJM 3 2021