Paragraph 52
Paragraph 52
Matter Number
ONSO3305US - Onsemi346
Paragraph Number
52
Application Number
16455676
Reference Case 1
ONSO3305US - Onsemi346
Reference Case 2
—
Created
3/3/21, 12:00 AM
Modified
3/3/21, 12:00 AM
Id
2,516
Content
Referring again to FIG. 1, the semiconductor device includes a passivation layer 13 around the edges and first side of the semiconductor die. In various implementations, the passivation layer may include, by non-limiting example, aluminum oxide, silicon dioxide, silicon nitride, aluminum nitride, and other dielectric materials that have good adhesion, are chemically inert, and/or corrosion resistant. As illustrated, the semiconductor package also includes solder balls 15 coupled to the first side of the semiconductor die. In various implementations, different surface mount interconnects such as pillars or stud bumps may be used. In some implementations, the interconnects may be formed of copper, solder, alloys thereof, or other electrically conductive materials.
Notes
Added by DJM 3 2021