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Beneficially, using a robust ECC algorithm allowing more than single bit correction or even double bit correction allows the life of the solid-state storage 110 to be extended. For example, if flash memory is used as the storage medium in the solid-state storage 110, the flash memory may be written approximately 100,000 times without error per erase cycle. This usage limit may be extended using a robust ECC algorithm. Having the ECC generator 304 and corresponding ECC correction module 322 onboard the solid-state storage device 102, the solid-state storage device 102 can internally correct errors and has a longer useful life than if a less robust ECC algorithm is used, such as single bit correction. However, in other embodiments the ECC generator 304 may use a less robust algorithm and may correct single-bit or double-bit errors. In another embodiment, the solid-state storage device 110 may comprise less reliable storage such as multi-level cell (“MLC”) flash in order to increase capacity, which storage may not be sufficiently reliable without more robust ECC algorithms.

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<w:p><w:pPr><w:pStyle w:val="TPSBody100"/></w:pPr><w:r><w:t xml:space="preserve">Beneficially, using a robust ECC algorithm allowing more than single bit correction or even double bit correction allows the life of the solid-state storage </w:t></w:r><w:r><w:t>110</w:t></w:r><w:r><w:t xml:space="preserve"> to be extended. For example, if flash memory is used as the storage medium in the solid-state storage </w:t></w:r><w:r><w:t>110</w:t></w:r><w:r><w:t xml:space="preserve">, the flash memory may be written approximately 100,000 times without error per erase cycle. This usage limit may be extended using a robust ECC algorithm. Having the ECC generator </w:t></w:r><w:r><w:t>304</w:t></w:r><w:r><w:t xml:space="preserve"> and corresponding ECC correction module </w:t></w:r><w:r><w:t>322</w:t></w:r><w:r><w:t xml:space="preserve"> onboard the solid-state storage device </w:t></w:r><w:r><w:t>102</w:t></w:r><w:r><w:t xml:space="preserve">, the solid-state storage device </w:t></w:r><w:r><w:t>102</w:t></w:r><w:r><w:t xml:space="preserve"> can internally correct errors and has a longer useful life than if a less robust ECC algorithm is used, such as single bit correction. However, in other embodiments the ECC generator </w:t></w:r><w:r><w:t>304</w:t></w:r><w:r><w:t xml:space="preserve"> may use a less robust algorithm and may correct single-bit or double-bit errors. In another embodiment, the solid-state storage device </w:t></w:r><w:r><w:t>110</w:t></w:r><w:r><w:t xml:space="preserve"> may comprise less reliable storage such as multi-level cell (“MLC”) flash in order to increase capacity, which storage may not be sufficiently reliable without more robust ECC algorithms.</w:t></w:r></w:p>