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Application
2380.2.01
US-20150012794-A1
US-20150205664-A1
US-20100023800-A1
US-8737141-A1
US-10157004-B2
US10007433A1
US-9159419-B2
US-10114589-A1
US-10134728-A1
US-20200065270-A1
US-10637533-B2
US-9927986-A1
US-8380915-A1
US-9159419-A1
US-9208071-A1
US-20200098728-A1
US-10643676-A1
US-10468073-B2
US-10283200-A1
US-10461965-B1
US-20130279232-A1
US-8892980-B2
US9632727A1
US10558561A1
US20100023800A1
US7230213A1
OPT-9
FLO-2
FLO-5PROV
ONSO3175(B) - Onsemi378
ONSO3305US - Onsemi346
GTS-3DES
FLO-4
US8762658B2
US8533406B2
US9632727B2
KMN-1PROV
PAT-2
PER-8 PROV
PER-9 PROV
INS-4PROV
HAR-1
CES-16
NXT-5PROV NXT-5, 6, 7, 8
IPP-0051-US14 cross roads
FLO-7PROV
IMI-5PROV
IPP-0050-US35 nextremity
VIL-12
OPT-13
TOY-1
US10998041B1
FSP1845
US6559866B2
Placeholder App
PER-10
KBR-1 1400.2.623
PER-13PROV
PAT-3
US20030023453
RMS-1DES
SMG-1DES
FLO-5
US10318495
US10133662B2
PER-11
US20140066758
VIL-17
PER-17
JBR-1
PER-12
US11056880
US11302645
US20210407565
US11081191
PON-1PROV, 2PROV, 3PROV
PER-33
RMT-1PROV
PER-32
PER-34
MCC-1
FLO-10
PER-14
PER-19
PER-22
PER-18
PER-24
TMC-PAT-1
DAR-2
PER-23
TMC-PAT-4
PER-16
PER-4 DIV1
PER-20
PER-21
BRT-PAT-1
TMC-PAT-5
TMC-PAT-6PROV
BRT-PAT-2-PROV
71212.157.USU1
FPR-PAT-1-PROV
71212.158.USP1
RMT-1
DAR-1PROV
DAR-2PROV
PON-1PROV
PON-2PROV
PON-3PROV
PER-18PROV
TMC-1PROV
TMC-2PROV
PER-13PCT
PER-13
PER-16PROV
PER-14PROV
PER-34PROV
TMC-4PROV
TMC-3
PAS-1PROV
VEH-1
PER-29DES
TEST.001
E2E-TEST.001
TEST-001
TEST-002
TEST-003
TEST-004
ZED006
FSP1011
GAV-PAT-1-PROV
Matter Number
Paragraph Number
62
Application Number
16455676
Reference Case 1
Reference Case 2
Content
The method also includes forming a second redistribution layer (RDL). The second RDL extends from the inner terminals of the first RDL to the first side of each of the plurality of semiconductor die. Referring to FIG. 14, the plurality of die 52 are illustrated after formation of the second RDL 62. In various implementations, the second RDL may be formed of similar material as the first RDL and include a combination of dielectric material and electrically conductive material. By non-limiting example, the RDLs described herein may include, by non-limiting example, polyimide, titanium, copper, nickel, aluminum, alloys thereof, any combination thereof, and other suitable combinations of materials to protect/insulate the semiconductor die and provide conductivity between the die pads of the semiconductor die and the outer electrical terminals of the device. Referring to FIG. 15, an enlargement of area B in FIG. 14 is illustrated. In FIG. 15, the second RDL 62 is illustrated as a single structure (though it is a multi-layered structure) mechanically coupling with the first RDL 32. The second RDL 62 is also electrically coupled with the first RDL 32 and provides connectivity between the first side of the semiconductor die and the second side of the semiconductor die. The second RDL will also provide electrical connectivity to the surface mount interconnect elements and any electrical connection elements within the semiconductor die.
Notes
Added by DJM 3 2021
Raw Data
<w:p w14:paraId="1F8A384B" w14:textId="5027ED0B" w:rsidR="00222482" w:rsidRDefault="00C317FB" w:rsidP="002377AC"><w:pPr><w:numPr><w:ilvl w:val="0"/><w:numId w:val="7"/></w:numPr><w:overflowPunct w:val="0"/><w:autoSpaceDE w:val="0"/><w:autoSpaceDN w:val="0"/><w:adjustRightInd w:val="0"/><w:spacing w:line="480" w:lineRule="auto"/><w:rPr><w:szCs w:val="24"/></w:rPr></w:pPr><w:r><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve">The method also includes forming a second redistribution layer (RDL). The second RDL extends from the inner terminals of the first RDL to the first side of each of the plurality of semiconductor die. Referring to FIG. 14, the plurality of die 52 are illustrated after formation of the second RDL </w:t></w:r><w:r w:rsidR="00DB3184"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t>62</w:t></w:r><w:r><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve">. </w:t></w:r><w:r w:rsidR="00DB3184"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve"> In various implementations, the second RDL may be formed of similar material as the first RDL and include a combination of dielectric material and </w:t></w:r><w:r w:rsidR="00DB3184"><w:rPr><w:szCs w:val="24"/></w:rPr><w:lastRenderedPageBreak/><w:t>electrically conductive material. By non-limiting example, the RDLs described herein may include</w:t></w:r><w:r w:rsidR="00273652"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t>, by non-limiting example,</w:t></w:r><w:r w:rsidR="00DB3184"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve"> polyimide, titanium, copper, nickel,</w:t></w:r><w:r w:rsidR="00273652"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve"> aluminum, alloys thereof,</w:t></w:r><w:r w:rsidR="00DB3184"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve"> any combination thereof, and other suitable </w:t></w:r><w:r w:rsidR="00273652"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve">combinations of </w:t></w:r><w:r w:rsidR="00DB3184"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t>material</w:t></w:r><w:r w:rsidR="00273652"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t>s</w:t></w:r><w:r w:rsidR="00DB3184"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve"> to protect</w:t></w:r><w:r w:rsidR="00273652"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t>/insulate</w:t></w:r><w:r w:rsidR="00DB3184"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve"> the semiconductor die and provide conductivity between the die pads of the semiconductor die and the outer electrical terminals of the device.</w:t></w:r><w:r><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve"> </w:t></w:r><w:r w:rsidR="00DB3184"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve"> Referring to FIG. 15, an enlargement of area B in FIG.</w:t></w:r><w:r w:rsidR="00C72FBE"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve"> 14 is illustrated. In FIG. 15, t</w:t></w:r><w:r w:rsidR="00DB3184"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve">he second RDL 62 is illustrated </w:t></w:r><w:r w:rsidR="00273652"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve">as a single structure (though it is a multi-layered structure) </w:t></w:r><w:r w:rsidR="00DB3184"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve">mechanically coupling with the first RDL 32. The second RDL </w:t></w:r><w:r w:rsidR="00273652"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve">62 </w:t></w:r><w:r w:rsidR="00DB3184"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve">is also electrically coupled with the first RDL </w:t></w:r><w:r w:rsidR="00273652"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve">32 </w:t></w:r><w:r w:rsidR="00DB3184"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve">and provides connectivity between the first side of the semiconductor die and the second side of the semiconductor die. The second RDL will also provide </w:t></w:r><w:r w:rsidR="00273652"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve">electrical </w:t></w:r><w:r w:rsidR="00DB3184"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve">connectivity to the </w:t></w:r><w:r w:rsidR="001A03CE"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve">surface mount </w:t></w:r><w:r w:rsidR="00DB3184"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve">interconnect </w:t></w:r><w:r w:rsidR="001A03CE"><w:rPr><w:szCs w:val="24"/></w:rPr><w:t xml:space="preserve">elements and any electrical connection elements within the semiconductor die. </w:t></w:r></w:p>
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