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| Matter Number | US-10134728-A1 | Application Id | 10 | ||||||
|---|---|---|---|---|---|---|---|---|---|
| Application Title | ESD centric low-cost IO layout design topology | Abstract | An integrated circuit may include a plurality of input/output (I/O) cells used for communicating signals, power, and ground to and from a core of the integrated circuit. The I/O cells may each include a bond pad formed in one or more top metal layers. One | ||||||
| Description | |||||||||
| Pub Number | US-10134728-A1 | Application Number | 15087004 | Patent Number | |||||
| Application Category | Attorney Matter Number | Url | https://patents.google.com/patent/US10134728B2/en | Url Pdf | https://patentimages.storage.googleapis.com/20/62/68/92aeec30ce6e10/US10134728.pdf | ||||
| Authored By | Brinks | May Reuse | 1 | Filing Date | Created | Modified | 3/16/21, 7:22 PM |