Matter US-10134728-A1
ESD centric low-cost IO layout design topology
Matter Number
US-10134728-A1
Application Id
10
May Reuse
1
Application Title
ESD centric low-cost IO layout design topology
Pub Number
US-10134728-A1
Application Number
15087004
Patent Number
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Application Category
—
Attorney Matter Number
—
Authored By
Brinks
Filing Date
—
Created
—
Modified
3/16/21, 7:22 PM
Assignee
SanDisk Technologies LLC
Abstract
An integrated circuit may include a plurality of input/output (I/O) cells used for communicating signals, power, and ground to and from a core of the integrated circuit. The I/O cells may each include a bond pad formed in one or more top metal layers. One
Description
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